PIC16F726-E/SO Microchip Technology, PIC16F726-E/SO Datasheet - Page 38

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PIC16F726-E/SO

Manufacturer Part Number
PIC16F726-E/SO
Description
14KB Flash Program, 1.8V-5.5V, 16MHz Internal Oscillator, 8b ADC, CCP, I2C/SPI,
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F726-E/SO

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPICE2000 - EMULATOR MPLAB-ICE 2000 POD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC16F72X/PIC16LF72X
3.6
On power-up, the time-out sequence is as follows: first,
PWRT time-out is invoked after POR has expired, then
OST is activated after the PWRT time-out has expired.
The total time-out will vary based on oscillator configu-
ration and PWRTE bit status. For example, in EC mode
with PWRTE bit = 1 (PWRT disabled), there will be no
time-out at all. Figure 3-4, Figure 3-5 and Figure 3-6
depict time-out sequences.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then,
bringing MCLR high will begin execution immediately
(see Figure 3-5). This is useful for testing purposes or
to
PIC16LF72X device operating in parallel.
Table 3-3 shows the Reset conditions for some special
registers.
TABLE 3-2:
TABLE 3-3:
DS41341E-page 38
XT, HS, LP
RC, EC, INTOSC
Note 1:
Legend: u = unchanged, x = unknown
Oscillator Configuration
POR
synchronize
0
1
u
u
u
u
Time-out Sequence
LP mode with T1OSC disabled.
(1)
BOR
u
0
u
u
u
u
TIME-OUT IN VARIOUS SITUATIONS
RESET BITS AND THEIR SIGNIFICANCE
more
TO
1
1
0
0
u
1
than
T
PWRT
PWRTE = 0
T
one
T
PWRT
PD
OSC
1
1
u
0
u
0
+ 1024 •
PIC16F72X/
Power-up
Power-on Reset
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during Sleep
1024 • T
PWRTE = 1
OSC
indicating that a Brown-out has occurred. The BOR
Status bit is a “don’t care” and is not necessarily
predictable if the brown-out circuit is disabled
3.7
The Power Control (PCON) register has two Status bits
to indicate what type of Reset that last occurred.
Bit 0 is BOR (Brown-out Reset). BOR is unknown on
Power-on Reset. It must then be set by the user and
checked on subsequent Resets to see if BOR = 0,
(BOREN<1:0> = 00 in the Configuration Word register).
Bit 1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a
subsequent Reset, if POR is ‘0’, it will indicate that a
Power-on Reset has occurred (i.e., V
gone too low).
For more information, see Section 3.5 “Brown-Out
Reset (BOR)”.
T
PWRT
PWRTE = 0
T
T
PWRT
Power Control (PCON) Register
OSC
+ 1024 •
Brown-out Reset
Condition
PWRTE = 1
1024 • T
© 2009 Microchip Technology Inc.
OSC
Wake-up from
1024 • T
DD
Sleep
may have
OSC

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