S25FL032P0XMFI011 Spansion Inc., S25FL032P0XMFI011 Datasheet - Page 11

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S25FL032P0XMFI011

Manufacturer Part Number
S25FL032P0XMFI011
Description
IC 32M CMOS 3V 104MHZ SPI BUS INTERFACE
Manufacturer
Spansion Inc.
Datasheet

Specifications of S25FL032P0XMFI011

Cell Type
NOR
Density
32Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Boot Type
Bottom/Top
Address Bus
1b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC W
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
4M
Supply Current
38mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Compliant

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3. Input/Output Descriptions
October 5, 2009 S25FL032P_00_05
W#/ACC/IO2
HOLD#/IO3
SO/IO1
Signal
SI/IO0
GND
SCK
CS#
V
CC
Input
Input
Input
Input
I/O
I/O
I/O
I/O
I/O
Figure 2.6 6x8 mm 24-ball BGA Package, 6x4 pin Configuration
Serial Data Output: Transfers data serially out of the device on the falling edge of SCK.
Functions as an input pin in Dual and Quad I/O, and Quad Page Program modes.
Serial Data Input: Transfers data serially into the device. Device latches commands,
addresses, and program data on SI on the rising edge of SCK. Functions as an output pin in
Dual and Quad I/O mode.
Serial Clock: Provides serial interface timing. Latches commands, addresses, and data on SI on
rising edge of SCK. Triggers output on SO after the falling edge of SCK.
Chip Select: Places device in active power mode when driven low. Deselects device and places
SO at high impedance when high. After power-up, device requires a falling edge on CS# before
any command is written. Device is in standby mode when a program, erase, or Write Status
Register operation is not in progress.
Hold: Pauses any serial communication with the device without deselecting it. When driven low,
SO is at high impedance, and all input at SI and SCK are ignored. Requires that CS# also be
driven low. Functions as an output pin in Quad I/O mode.
Write Protect: Protects the memory area specified by Status Register bits BP2:BP0. When
driven low, prevents any program or erase command from altering the data in the protected
memory area. Functions as an output pin in Quad I/O mode.
Supply Voltage
Ground
D a t a
S h e e t
S25FL032P
NC
B1
NC
NC
NC
A1
C1
D1
NC
NC
F1
E1
SO/IO1
SCK
CS#
NC
C2
NC
A2
B2
D2
NC
E2
F2
SI/IO0 HOLD#/IO3
GND
NC
NC
NC
A3
B3
D3
C3
NC W#/ACC/IO2
E3
F3
Description
VCC
NC
NC
NC
C4
D4
E4
F4
A4
B4
11

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