MT45W4MW16PCGA-70 IT Micron Technology Inc, MT45W4MW16PCGA-70 IT Datasheet - Page 9

• Manufacturer Part Number: MT45W4MW16PCGA-70 IT
• Manufacturer: Micron Technology Inc

Specifications of MT45W4MW16PCGA-70 IT

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Figure 8:
Deep Power-Down Operation (DPD)
PDF: 09005aef81f0698d / Source: 09005aef81f06935
64mb_asyncpage_cr1_0_p25z.fm - Rev. D 7/09 EN
Software Access PAR Functionality
DPD operation disables all refresh-related activity. This mode is used when the system
does not require the storage provided by the CellularRAM device. Any stored data will
become corrupted when DPD is entered. When refresh activity has been re-enabled, the
CellularRAM device will require 150µs to perform an initialization procedure before
normal operations can resume. READ and WRITE operations are ignored during DPD
operation.
The device can only enter DPD if the SLEEP bit in the CR has been set LOW (CR[4] = 0).
DPD is initiated by bringing ZZ# LOW for longer than 10µs. Returning ZZ# HIGH will
cause the device to exit DPD and begin a 150µs initialization process. During this 150µs
period, the current consumption will be higher than the specified standby levels but
considerably lower than the active current specification.
Driving ZZ# LOW will place the device in the PAR mode if the SLEEP bit in the CR has
been set HIGH (CR[4] = 1).
The device should not be put into DPD using CR software access.
NO
PAR permanently
independent of
To enable PAR,
bring ZZ# LOW
Change to ZZ#
functionality.
executed?
Power-Up
ZZ# level.
for 10µs.
Software
enabled,
LOAD
YES
64Mb: 4 Meg x 16 Async/Page CellularRAM 1.0
9
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Low-Power Operation
©2005 Micron Technology, Inc. All rights reserved.