QG80333M500 S L8CC Intel, QG80333M500 S L8CC Datasheet - Page 37

• Manufacturer Part Number: QG80333M500 S L8CC
• Manufacturer: Intel

Specifications of QG80333M500 S L8CC

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

17.
Issue:
Status:
Specification Update
SHPC sequence
When using parallel 1-slot, no-glue Hot-Plug mode, the frequency does not update correctly with a
single reset; therefore, two B-segment resets are required. The first reset is needed to correctly
latch in the B_PCIXCAP and B_M66EN, and the second reset is needed to execute the change
frequency command. This sequence must be followed:
No
1. PWRGD 0 -> 1 (HW)
2. B_RST# 0 -> 1 (HW), at this time HPRST# is 0
3. Enable Slot Power (SW normal sequence)
4. Issue Hot-Plug change frequency with code 40 (PCI = 33M).
5. HPRST# 0 -> 1 (SW slot enable)
6. HPRST# = 1 (change frequency) [Note: this is a software step. Bus reset happens
7. HPRST# 1 -> 0 (SW slot disable)
8. Go to step 2
Fix. See the
automatically due to the change frequency.]
…operating…
…off/removal…
…new card inserted…
Table , “Summary Table of Changes” on page
7.
Specification Clarifications
Intel® 80333 I/O Processor
37