SSTU32866EC-S NXP Semiconductors, SSTU32866EC-S Datasheet - Page 22
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SSTU32866EC-S
Manufacturer Part Number
SSTU32866EC-S
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SSTU32866EC-S.pdf
(29 pages)
Specifications of SSTU32866EC-S
Logic Family
SSTU
Logical Function
Registered Buffer
Number Of Elements
1
Number Of Bits
25
Number Of Inputs
25
Number Of Outputs
25
High Level Output Current
-8mA
Low Level Output Current
8mA
Package Type
LFBGA
Propagation Delay Time
3ns
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
450(Min)MHz
Mounting
Surface Mount
Pin Count
96
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant
Philips Semiconductors
9397 750 14181
Product data sheet
Fig 26. Partial Parity Out voltage waveforms; propagation delay times with respect to
V
t
V
V
RESET input
PLH
TT
IH
IL
= V
= V
= V
and t
REF
REF
DD
PHL
/2
+ 250 mV (AC voltage levels) for differential inputs. V
250 mV (AC voltage levels) for differential inputs. V
are the same as t
Rev. 02 — 11 November 2004
RESET
output
LVCMOS
1.8 V DDR2 configurable registered buffer with parity
PD
.
V
t
DD
PHL
/2
V
002aaa376
TT
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
IL
IH
= V
V
V
V
V
= V
IH
IL
OH
OL
DD
DD
SSTU32866
for LVCMOS inputs.
for LVCMOS inputs.
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