ML610Q422-NNNTBZ03A7 Rohm Semiconductor, ML610Q422-NNNTBZ03A7 Datasheet - Page 137

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ML610Q422-NNNTBZ03A7

Manufacturer Part Number
ML610Q422-NNNTBZ03A7
Description
MCU 8BIT 32K FLASH 22CH 120-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q422-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Quantity
Price
Part Number:
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Manufacturer:
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10.2.7
Address: 0F035H
Access: R/W
Access size: 8 bits
Initial value: 00H
TM1C is a special function register (SFR) that functions as an 8-bit binary counter.
When write operation to TM1C is performed, TM1C is set to “00H”. The data that is written is meaningless.
In 16-bit timer mode and 16-bit timer frequency measurement mode, if write operation is performed to either the
low-order TM0C or high-order TM1C, both the low order and the high order are set to “0000H”.
When reading TM1C in 16-bit timer mode, be sure to read TM0C first since the count value of TM1C is stored in the
TM1C latch when TM0C is read.
During timer operation, the contents of TM1C may not be read depending on the conditions of the timer clock and the
system clock.
Table 10-2 shows whether a TM1C read is enabled or disabled during timer operation for each condition of the timer
clock and system clock.
Initial value
TM1C
R/W
External clock
Timer clock
Timer 1 Counter Register (TM1C)
HTBCLK
HTBCLK
LSCLK
LSCLK
T1CK
T1C7
R/W
7
0
Table 10-2 TM1C Read Enable/Disable during Timer Operation
System clock
T1C6
R/W
SYSCLK
6
0
HSCLK
HSCLK
HSCLK
LSCLK
LSCLK
LSCLK
T1C5
R/W
5
0
Read enabled
Read enabled. However, to prevent the reading of undefined
data during incremental counting, read TM1C twice and check
that the results match.
Read disabled
Read enabled
Read disabled
T 1C4
R/W
10 – 9
4
0
T 1C3
R/W
TM1C read enable/disable
3
0
ML610Q421/ML610Q422 User’s Manual
T1C2
R/W
2
0
T1C1
R/W
1
0
Chapter 10 Timers
T1C0
R/W
0
0

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