ML610Q408-NNNTBZ03A7 Rohm Semiconductor, ML610Q408-NNNTBZ03A7 Datasheet - Page 185
ML610Q408-NNNTBZ03A7
Manufacturer Part Number
ML610Q408-NNNTBZ03A7
Description
MCU 8BIT 16K FLASH 8CH 100-TQFP
Manufacturer
Rohm Semiconductor
Series
-r
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q407P-NNNTB03A7.pdf
(33 pages)
3.ML610Q407P-NNNTB03A7.pdf
(391 pages)
Specifications of ML610Q408-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
2MHz
Connectivity
SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.25 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q408-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
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Chapter 12 Synchronous Serial Port
12.3.3 Transmit/Receive Operation
When “1” is written to the SnMD1 bit and "1" is written to the SnMD0 bit of the serial port mode register (SIOnMOD0),
this LSI is set to the transmit/receive mode.
When the SnEN bit of the serial port control register (SIOnCON) is set to “1”, transmission/reception starts. When
transmission/reception of 8/16-bit data terminates, a synchronous serial port interrupt (SIOnINT) occurs and the SnEN
bit is set to “0”.
The received data is input from the tertiary function pins (P40/SIN0 or P44/SIN0) or the tertiary function pin (P50/SIN1,
P54SIN1) of GPIO, and the transmitted data is output from the tertiary function pins (P42/SOUT0 or P46/SOUT0) or the
tertiary function pin (P52/SOUT1) of GPIO.
When an internal clock is selected in the serial port mode register (SIOnMOD1), the LSI is set to a master mode and
when an external clock (SCKn) is selected, the LSI is set to a slave mode.
The serial port mode register (SIOnMOD0) enables selection of MSB first/LSB first.
The received data input pin (SINn), the transmitted data output pin (SOUTn), and the transfer clock input/output pin
(SCKn) need to be set to the tertiary function for the Port 4 or to the secondary function for the Port 5.
Figure 12-10 shows the transmit/receive operation waveforms of the synchronous serial port (16-bit length, LSB first,
clock types 0, positive logic).
Shift register
SIOnRCH,L
SIOnTRH,L
SIOnINT
SOUTn
SCKn
SnEN
SINn
Figure 12-10 Transmit/Receive Operation Waveforms of Synchronous Serial Port
(16-bit Length, LSB First, Clock Type 0, Positive Logic))
Transmitted data
0
0
0
1
1
1
2
2
2
3
3
12-14
3
12
12
12
13
13
13
14
14
14
15
15
Received data
15
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