ML610Q408-NNNTBZ03A7 Rohm Semiconductor, ML610Q408-NNNTBZ03A7 Datasheet - Page 57

• Manufacturer Part Number: ML610Q408-NNNTBZ03A7
• Description: MCU 8BIT 16K FLASH 8CH 100-TQFP
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of ML610Q408-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.25 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 100-TFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.3.3.1 STOP Mode When CPU Operates with Low-Speed Clock
4.3.3
The STOP mode is the state where low-speed oscillation and high-speed oscillation stop and the CPU and peripheral
circuits stop the operation.
When the stop code acceptor is enabled by writing “5nH”(n: an arbitrary value) and “0AnH”(n: an arbitrary value) to the
stop code acceptor (STPACP) sequentially and the STP bit of the standby control register (SBYCON) is set to “1”, the
STOP mode is entered. When the STOP mode is set, the STOP code acceptor is disabled.
When any of the P00 to P04 interrupt requests or an external 8 interrupt request occurs with the interrupt enabled (the
interrupt enable flag is "1"), the STP bit is set to "0", the STOP mode is released, and the mode is returned to the
program run mode.
When the stop code acceptor is in the enabled state and the STP bit of SBYCON is set to “1”, the STOP mode is entered,
stopping low-speed oscillation and high-speed oscillation.
When any of the P00 to P04 interrupt request or an external 8 interrupt request occurs with the interrupt enabled
(interrupt enabled flag is "1") state, the STP bit becomes "0" and the low-speed oscillation resumes. If the high-speed
clock was oscillating before the STOP mode is entered, the high-speed oscillation restarts. When the high-speed clock
was not oscillating before the STOP mode is entered, high-speed oscillation does not start.
When an interrupt request occurs, the STOP mode is released after the elapse of the low-speed oscillation start time
(T
program run mode, and the low-speed clock (LSCLK) restarts supply to the peripheral circuits. If the high-speed clock
already started oscillation at this time, the high-speed clocks (OSCLK and HSCLK) also restart supply to the peripheral
circuits.
For the low-speed oscillation start time (T
Figure 4-3 shows the operation waveforms in STOP mode when CPU operates with the low-speed clock.
High-speed oscillation
oscillation waveform
XTL
SBYCON.STP bit
Figure 4-3 Operation Waveforms in STOP Mode When CPU Operates with Low-Speed Clock
STOP mode
) and the low-speed clock (LSCLK) oscillation stabilization time (8192-pulse count), the mode is returned to the
Low-speed
SYSCLK
waveform
Interrupt
HSCLK
request
LSCLK
oscillation waveform
Program run mode
HSCLK
XTL
), see Appendix C, “Electrical Characteristics”.
High-speed
oscillation
Maximum 1
count
Hiz
4-11
STOP mode
T
XTL
High-speed
oscillation
16 counts
Low-speed
oscillation
8192 counts
oscillation
waveform
Chapter 4 MCU Control Function
oscillation waveform
Program run mode
HSCLK waveform