MM74HC4046N Fairchild Semiconductor, MM74HC4046N Datasheet

MM74HC4046N

Manufacturer Part Number

MM74HC4046N

Description

IC LOCK LOOP PHASE CMOS 16-DIP

Manufacturer

Fairchild Semiconductor

Series

74HCr

Type

Phase Lock Loop (PLL)r

Datasheets

1.MM74HC4046N.pdf (17 pages)

2.MM74HC4046N.pdf (16 pages)

Specifications of MM74HC4046N

Pll

Input

CMOS

Output

3-State

Number Of Circuits

Ratio - Input:output

1:2

Differential - Input:output

No/No

Frequency - Max

14MHz

Divider/multiplier

No/No

Voltage - Supply

2 V ~ 6 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Through Hole

Package / Case

16-DIP (0.300", 7.62mm)

Frequency-max

14MHz

Supply Voltage (max)

6 V

Supply Voltage (min)

2 V

Maximum Operating Temperature

+ 85 C

Minimum Operating Temperature

- 40 C

Mounting Style

Through Hole

Operating Supply Voltage

2.5 V, 3.3 V, 5 V

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

MM74HC4046N

Manufacturer:

Quantity:

1 200

Company:

Meier Automation Equipment Co., Limited

Part Number:

MM74HC4046N

Manufacturer:

FAIRCHILD/仙童

Quantity:

20 000

Current page: 1 of 16
Download datasheet (219Kb)

MM74HC4046M

MM74HC4046SJ

MM74HC4046MTC

MM74HC4046N

MM74HC4046

CMOS Phase Lock Loop

General Description

The MM74HC4046 is a low power phase lock loop utilizing

advanced silicon-gate CMOS technology to obtain high fre-

quency operation both in the phase comparator and VCO

sections. This device contains a low power linear voltage

controlled oscillator (VCO), a source follower, and three

phase comparators. The three phase comparators have a

common signal input and a common comparator input. The

signal input has a self biasing amplifier allowing signals to

be either capacitively coupled to the phase comparators

with a small signal or directly coupled with standard input

logic levels. This device is similar to the CD4046 except

that the Zener diode of the metal gate CMOS device has

been replaced with a third phase comparator.

Phase Comparator I is an exclusive OR (XOR) gate. It pro-

vides a digital error signal that maintains a 90 phase shift

between the VCO’s center frequency and the input signal

(50% duty cycle input waveforms). This phase detector is

more susceptible to locking onto harmonics of the input fre-

quency than phase comparator I, but provides better noise

rejection.

Phase comparator III is an SR flip-flop gate. It can be used

to provide the phase comparator functions and is similar to

the first comparator in performance.

Phase comparator II is an edge sensitive digital sequential

network. Two signal outputs are provided, a comparator

output and a phase pulse output. The comparator output is

a 3-STATE output that provides a signal that locks the VCO

output signal to the input signal with 0 phase shift between

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Order Number

Package Number

MTC16

M16A

M16D

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

DS005352.prf

them. This comparator is more susceptible to noise throw-

ing the loop out of lock, but is less likely to lock onto har-

monics than the other two comparators.

In a typical application any one of the three comparators

feed an external filter network which in turn feeds the VCO

input. This input is a very high impedance CMOS input

which also drives the source follower. The VCO’s operating

frequency is set by three external components connected

to the C1A, C1B, R1 and R2 pins. An inhibit pin is provided

to disable the VCO and the source follower, providing a

method of putting the IC in a low power state.

The source follower is a MOS transistor whose gate is con-

nected to the VCO input and whose drain connects the

Demodulator output. This output normally is used by tying

a resistor from pin 10 to ground, and provides a means of

looking at the VCO input without loading down modifying

the characteristics of the PLL filter.

Features

Low dynamic power consumption:

Maximum VCO operating frequency:

12 MHz (V

Fast comparator response time (V

VCO has high linearity and high temperature stability

Comparator I:

Comparator II:

Comparator III: 25 ns

Package Description

4.5V)

25 ns

30 ns

February 1984

Revised February 1999

www.fairchildsemi.com

4.5V)

Related parts for MM74HC4046N

MM74HC4046N Summary of contents

Page 1

... MM74HC4046MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC4046N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Block Diagram www.fairchildsemi.com 2 ...

Page 3

Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage (V ) OUT Clamp Diode Current ( Output Current per pin (I ) OUT DC ...

Page 4

AC Electrical Characteristics V = 2.0 to 6.0V pF (unless otherwise specified Symbol Parameters Conditions AC Coupled C (series) Input Sensitivity, f 500 kHz IN Signal In t ...

Page 5

Typical Performance Characteristics Typical Center Frequency vs R1 4.5V CC Typical Offset Frequency vs R2 4.5V CC Typical VCO Power Dissipation @ Center Frequency vs R1 Typical Center Frequency vs R1 Typical ...

Page 6

Typical Performance Characteristics VCO 4.5V in out CC VCO vs out Temperature V 4.5V CC www.fairchildsemi.com (Continued) VCO 4.5V in out CC VCO vs out Temperature ...

Page 7

Typical Performance Characteristics HC4046 Typical Source Follower Power Dissipation vs RS Typical VCO Linaearity vs R1 & C1 (Continued) Typical R2/R1 max min V 4.5V & max min Typical VCO Linearity vs R1 ...

Page 8

Detailed Circuit Description VOLTAGE CONTROLLED OSCILLATOR/SOURCE FOLLOWER The VCO requires two or three external components to operate. These are R1, R2, C1. Resistor R1 and capacitor C1 are selected to determine the center frequency of the VCO. R1 controls the ...

Page 9

FIGURE 2. Logic Diagram for VCO The input to the VCO is a very high impedance CMOS input and so it will not load down the loop filter, easing the filters design. In order to make signals at the VCO ...

Page 10

FIGURE 4. Typical Phase Comparator I. Waveforms Thus in normal operation V and ground voltage levels CC are fed to the loop filter. This differs from some phase detectors which supply a current output to the loop filter and this ...

Page 11

Phase Comparator State Diagrams FIGURE 5. PLL State Tables 11 www.fairchildsemi.com ...

Page 12

FIGURE 6. Logic Diagram for Phase Comparator II FIGURE 7. Typical Phase Comparator II Output Waveforms www.fairchildsemi.com 12 ...

Page 13

If the VCO leads the signal then when the leading edge of the VCO is seen the output of the phase comparator goes LOW. This discharges the loop filter until the leading edge of the signal is detected at which ...

Page 14

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M16A Package Number M16D 14 ...

Page 15

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 15 www.fairchildsemi.com ...

Page 16

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN ...

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