ISP1583BS,557 NXP Semiconductors, ISP1583BS,557 Datasheet - Page 40
ISP1583BS,557
Manufacturer Part Number
ISP1583BS,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1583BS557.pdf
(100 pages)
Specifications of ISP1583BS,557
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Compliant
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NXP Semiconductors
Table 37.
ISP1583_7
Product data sheet
Bit
Symbol
Reset
Bus reset
Access
Control Function register: bit allocation
9.3.2 Control Function register (address: 28h)
7
-
-
-
Table 35.
Table 36.
The Control Function register performs the buffer management on endpoints. It consists
of 1 byte, and the bit configuration is given in
validate any enabled endpoint. Before accessing this register, the Endpoint Index register
must first be written to specify the target endpoint.
Bit
7 to 6
5
4 to 1
0
Buffer name
SETUP
Control OUT
Control IN
Data OUT
Data IN
reserved
6
-
-
-
Symbol
-
EP0SETUP
ENDPIDX[3:0] Endpoint Index: Selects the target endpoint for register access of
DIR
Endpoint Index register: bit description
Addressing of endpoint buffers
5
-
-
-
Rev. 07 — 22 September 2008
EP0SETUP
1
0
0
0
0
Description
reserved
Endpoint 0 Setup: Selects the SETUP buffer for endpoint 0.
0 — Data buffer
1 — SETUP buffer
Must be logic 0 for access to endpoints other than set-up token buffer.
buffer length, buffer status, control function, data port, endpoint type
and MaxPacketSize.
Direction: Sets the target endpoint as IN or OUT.
0 — Target endpoint refers to OUT (RX) FIFO
1 — Target endpoint refers to IN (TX) FIFO
CLBUF
R/W
4
0
0
VENDP
R/W
3
0
0
ENDPIDX
00h
00h
00h
0Xh
0Xh
Table
37. Register bits can stall, clear or
Hi-Speed USB peripheral controller
DSEN
W
2
0
0
STATUS
DIR
0
0
1
0
1
R/W
1
0
0
© NXP B.V. 2008. All rights reserved.
ISP1583
STALL
R/W
0
0
0
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