ZT5515A-1BW Intel, ZT5515A-1BW Datasheet - Page 12

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ZT5515A-1BW

Manufacturer Part Number
ZT5515A-1BW
Description
Manufacturer
Intel
Datasheet

Specifications of ZT5515A-1BW

Lead Free Status / Rohs Status
Supplier Unconfirmed
Introduction
2.3
2.3.1
12
Figure 2. Functional Block Diagram
Functional Blocks
The block diagram below shows basic features of the ZT 5515. The following sections provide
more detail on the features of the ZT 5515.
CompactPCI*/PSB Architecture
The ZT 5515 is designed to operate in a CompactPCI Packet Switching Backplane system
(CompactPCI/PSB) though the board does not contain a CompactPCI bus. This allows the ZT 5515
to be used in any system master or peripheral slot of a PICMG* 2.0 compliant chassis without
interfering with the CompactPCI bus. The ZT 5515 only uses the J1 and J2 connectors for power
and IPMI signaling.
Intel
Standard AT* Systems include:
— Two enhanced interrupt controllers (8259)
— Three counter/timers (one 8254)
— Real-time clock/CMOS RAM (146818B)
— Two enhanced DMA controllers (8237)
— 8042A compatible keyboard controller
— PS/2 mouse and keyboard
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NetStructure
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ZT 5515 Compute Processor Board Technical Product Specification