ZT5515A-1BW Intel, ZT5515A-1BW Datasheet - Page 56

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ZT5515A-1BW

Manufacturer Part Number
ZT5515A-1BW
Description
Manufacturer
Intel
Datasheet

Specifications of ZT5515A-1BW

Lead Free Status / Rohs Status
Supplier Unconfirmed
System BIOS
9.5.3
9.5.4
9.5.5
9.6
56
PCI Auto-configuration
The system BIOS supports the INT 1Ah, AH = B1h functions, in conformance with the PCI Local
Bus Specification, Revision 2.1. The system BIOS also supports the 16 and 32-bit protected mode
interfaces as required by the PCI BIOS Specification, Revision 2.1.
Beginning at the lowest device, the BIOS uses a “depth-first” scan algorithm to enumerate the PCI
buses. Each time a bridge device is located, the bus number is incremented and scanning continues
on the secondary side of the bridge before all devices are scanned on the current bus. The BIOS
then scans for PCI devices using a “breadth-first” search – all devices on a given bus are scanned
from lowest to highest before the next bus number is scanned.
System BIOS POST maps each device into memory and/or I/O space, and assigns IRQ channels as
required. The BIOS programs the PCI-ISA interrupt routing logic in the chipset hardware to steer
PCI interrupts to compatible ISA IRQs.
The BIOS dispatches any option ROM code for PCI devices to the DOS compatibility hole
(C0000h to DFFFFh) and transfers control to the entry point. The DOS compatibility hole is a
limited resource, so system configurations with a large number of PCI devices may result in a
shortage of this resource. If the BIOS runs out of option ROM space, some PCI option ROMs are
not be executed and a POST error is generated. Scanning PCI option ROMs may be controlled on a
slot by slot basis in the BIOS setup.
Drivers and/or the OS can detect the installed devices and determine resource consumption using
the defined PCI, legacy PnP BIOS, and/or ACPI BIOS interface functions.
Legacy ISA Configuration
Legacy ISA add-in devices are not supported by these platforms.
Automatic Detection of Video Adapters
The BIOS detects video adapters in the following order:
Offboard PCI
Onboard PCI
The onboard (or offboard) video BIOS is shadowed, starting at address C0000h, and is initialized
before memory tests begin in POST. Precedence is always given to offboard devices.
BIOS Recovery
If the system fails to complete POST and boot an operating system, the BMC will switch to the
backup BIOS (in flash) to boot, then the runtime BIOS (in flash) can be re-programmed with the
flash utility.
Intel
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NetStructure
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ZT 5515 Compute Processor Board Technical Product Specification