ZT5515A-1BW Intel, ZT5515A-1BW Datasheet - Page 41

no-image

ZT5515A-1BW

Manufacturer Part Number
ZT5515A-1BW
Description
Manufacturer
Intel
Datasheet

Specifications of ZT5515A-1BW

Lead Free Status / Rohs Status
Supplier Unconfirmed
Watchdog Timer
8.1
Intel
Figure 7. Watchdog Timer Architecture
®
NetStructure
This chapter explains the operation of the ZT 5515’s watchdog timer. It provides an overview of
watchdog operation and features, as well as sample code to help you learn how the watchdog timer
works with applications.
Watchdog Timer Overview
The primary function of the watchdog timer is to monitor the ZT 5515’s operation and take
corrective action if the software fails to function as programmed. The major features of the
watchdog timer are:
The ZT 5515’s custom watchdog timer circuit is implemented in a programmable logic device. The
watchdog timer contains a “Control and Status Register” (see
page 78
caused a particular reset.
The watchdog timer drives the First and Second Stages as follows:
Eight timeout intervals are selectable through bits 0-2 of the register. The intervals range from a
minimum of 250 ms to a maximum of 256 seconds. See
page 78
timer caused the reset event. The watchdog timer register is cleared on power-up, enabling the
system software to take appropriate action if the watchdog generated the reboot.
1. The watchdog times out (First Stage) after a selected timeout interval.
2. NMI or INIT (software selectable) is driven high.
3. A hard reset occurs (Second Stage) 250 ms later.
TM
Two-stage operation (meaning that it can be enabled to produce a non-maskable interrupt
[NMI] or a “CPU init” before it generates a reset)
Enabled and disabled through software control
Armed and strobed through software control
ZT 5515 Compute Processor Board Technical Product Specification
for more information). The register allows applications to determine if a watchdog timeout
to see all possible timeout periods. A register bit can be enabled to indicate if the watchdog
Address/Data
Slow Clock
Port 79h
Control
and Status
Register
Watchdog Circuit
Section C.1.2, “Watchdog (79h)” on
Section C.1.2, “Watchdog (79h)” on
Counter
Watchdog Timer
Reset
NMI
CPU Init
8
41