SP000105547ZV Infineon Technologies, SP000105547ZV Datasheet - Page 8

• Manufacturer Part Number: SP000105547ZV
• Manufacturer: Infineon Technologies

Specifications of SP000105547ZV

• Switch Type: Low Side
• Power Switch Family: TLE 7230
• Input Voltage: -0.3 to 6V
• Power Switch On Resistance: 800mOhm
• Output Current: 1A
• Number Of Outputs: 8
• Mounting: Surface Mount
• Supply Current: 3mA
• Package Type: DSO
• Operating Temperature (min): -40C
• Operating Temperature (max): 150C
• Operating Temperature Classification: Automotive
• Pin Count: 38
• Lead Free Status / Rohs Status: Compliant

CS – Chip Select of the Serial Peripheral Interface
SO – Signal Output of the Serial Peripheral Interface
SI – Signal Input of the Serial Peripheral Interface. The pin has an internal pull down structure.
SCLK – Clock Input of the Serial Peripheral Interface. The pin has an internal pull down structure
SPI
The SPI is a Serial Peripheral Interface with 4 digital pins
and a 16 bit shift register. The SPI is used to configure and
program the device, turn on and off channels and to read
detailed diagnostic information.
SPI Signal Description:
CS - Chip Select. The system microcontroller selects the TLE 7230 R by means of the CS pin. When-
ever the pin is in a logic low state, data can be exchanged between the µC and TLE 7230 R.
CS = L: SPI functions as a shift register. With each clock signal at the SCLK pin the state of the SI is
read into the SPI shift-register (falling clock edge) and one diagnosis bit is written out of SO (rising
edge).
CS = LàH:
To avoid any false clocking the serial clock input pin SCLK should be logic low state during high to low
transition of CS. The SPI of the TLE 7230 R has an integrated modulo 8 counter. If the number of
clock signals is not an integer multiple of 8 the SPI will not accept the data in the shift register and the
fault register will not be reset.
SCLK - Serial Clock. The serial clock pin clocks the internal SPI shift register of the TLE 7230 R. The
serial input (SI) accepts data into the input SPI shift register on the falling edge while the serial output
(SO) shifts diagnostic information out of the SPI shift register on the rising edge of serial clock. It is
essential that the SCLK pin is in a logic low state whenever chip select (CS) makes any transition.
V3.4
Serial input
data MSB first
SI
transfer of SI bits from SPI shift register into the internal logic registers sent command is valid
reset of diagnosis register if sent command is valid
LSB
LSB
internal logic registers
16 bit SPI shift register
CS
diagnosis register
CS
MSB
MSB
Serial output
(diagnosis)
data
MSB first
Page
SO
8
D a t a S h e e t T L E 7 2 3 0 R
CS = H: Any signals at the SCLK and SI
pins are ignored and SO is forced into a
high impedance state.
CS = HàL:
SCLK
diagnostic information is transferred
from the diagnosis register into the
SPI shift register. (in sleep mode no
transfer of diagnostic information)
serial input data can be clocked into
the SPI shift register from then on
SO changes from high impedance
state to logic high or low state corre-
sponding to the SO bits
SO
CS
SI
SPI
2009-07-15