MPCBL5524A1D Intel, MPCBL5524A1D Datasheet - Page 46
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MPCBL5524A1D
Manufacturer Part Number
MPCBL5524A1D
Description
Manufacturer
Intel
Datasheet
1.MPCBL5524A1D.pdf
(95 pages)
Specifications of MPCBL5524A1D
Lead Free Status / Rohs Status
Supplier Unconfirmed
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IDE Interface
5.3
46
Intel NetStructure
I/O Mapping
The I/O map for the IDE interface varies depending on the mode of operation (see
Address Map” on page
interface uses the PC-AT legacy addresses of 1F0h-1F7h, with 3F6h and interrupt IRQ14 for the
primary channel. The secondary channel uses I/O addresses 170h-177h, 376h, and interrupt
IRQ15. No memory addresses are used.
®
ZT 5524 / MPCBL5524 High-Performance System Master Processor Board TPS
31). The default mode is compatibility mode, which means that the
Table 1, “I/O