MPCBL5524A1D Intel, MPCBL5524A1D Datasheet - Page 70

no-image

MPCBL5524A1D

Manufacturer Part Number
MPCBL5524A1D
Description
Manufacturer
Intel
Datasheet

Specifications of MPCBL5524A1D

Lead Free Status / Rohs Status
Supplier Unconfirmed
Specifications
A.3.2.14
A.3.2.15
70
Table 31. J18 ISP Programming Interface
Table 32. J19 EIDE Interface Pinout (Sheet 1 of 2)
Intel NetStructure
J18 (ISP Programming Interface)
J18 is a dual-row 10-pin, female, 2 mm (.079 in) center, vertical header providing an on-board ISP
interface. See the following table for pin definitions.
J19 (EIDE Interface)
J19 is a dual-row 50-pin, female, 2 mm (.079 in) center, vertical socket providing an on-board
EIDE interface. See the following table for pin definitions.
Pin#
Pin
10
12
13
14
15
16
17
18
11
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
RST-
GND
DDP7
DDP8
DDP6
DDP9
DDP5
DDP10
DDP4
DDP11
DDP3
DDP12
DDP2
DDP13
DDP1
DDP14
DDP0
DDP15
Signal Name
Signal
®
MODE
VCC3
TDO-
GND
GND
GND
GND
TCK
TDI
ZT 5524 / MPCBL5524 High-Performance System Master Processor Board TPS