MPCBL5524A1D Intel, MPCBL5524A1D Datasheet - Page 50

• Manufacturer Part Number: MPCBL5524A1D
• Manufacturer: Intel

Specifications of MPCBL5524A1D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Watchdog Timer
6.4.2.1
6.4.2.2
50
Intel NetStructure
Chaining the ISRs
Save the original NMI ISR vector so that it can be invoked from the new watchdog NMI ISR. Alter
the interrupt vector table so that the NMI ISR vector is overwritten with a vector to the watchdog
ISR. C code to do this in DOS might look like the following:
#define NMI_INTERRUPT_VECTOR_NUMBER 2
void interrupt far (*OldNMIIsr)();
void HookWatchdogIsr(void){
//
// To be absolutely certain the interrupt table is not accessed by an NMI (This is
// quite unlikely.), the application could disable the NMI in the chipset before
// installing the new vector.
//
.
.
.
//
// Install the new ISR.
//
OldNMIIsr = getvect(IsrVector);
vector.
setvect(NMI_INTERRUPT_VECTOR_NUMBER, WatchdogIsr);
}
Enabling the Watchdog NMI
To activate the NMI feature, enable it in the Watchdog register (Port 79h). Register specifications
are located in
The code to do this might look like the following:
#define WD_NMI_EN_BIT_SET
void EnableWatchdogNMI(void){
}
unsigned char WdValue;
WdValue = inb(WD_CSR_IO_ADDRESS);
WdValue |= WD_NMI_EN_BIT_SET;
copy.
outb(WD_CSR_IO_ADDRESS,WdValue);
®
Appendix B, “Watchdog (79h).”
ZT 5524 / MPCBL5524 High-Performance System Master Processor Board TPS
0x10
// Assert the enable in the watchdog
// Holds watchdog register values.
//
// Read the current contents of the
//watchdog register.
// Assert the enable bit in the local
// register.
// Save the old
// Install the new.