LFEC15E-5FN484C Lattice, LFEC15E-5FN484C Datasheet - Page 69

• Manufacturer Part Number: LFEC15E-5FN484C
• Description: FPGA LatticeEC Family 15400 Cells 420MHz 130nm (CMOS) Technology 1.2V 484-Pin FBGA
• Manufacturer: Lattice

Specifications of LFEC15E-5FN484C

• Package: 484FBGA
• Family Name: LatticeEC
• Device Logic Units: 15400
• Maximum Internal Frequency: 420 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 352
• Ram Bits: 358400
• In System Programmability: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
PICs and DDR Data (DQ) Pins Associated with the DDR Strobe (DQS) Pin
P[Edge] [n-4]
P[Edge] [n-3]
P[Edge] [n-2]
P[Edge] [n-1]
P[Edge] [n]
P[Edge] [n+1]
P[Edge] [n+2]
P[Edge] [n+3]
Notes:
1. “n” is a Row/Column PIC number
2. The DDR interface is designed for memories that support one DQS strobe per eight bits of
3. PIC numbering definitions are provided in the “Signal Names” column of the Signal Descrip-
data. In some packages, all the potential DDR data (DQ) pins may not be available.
tions table.
PICs Associated
with DQS Strobe
PIO Within PIC
4-3
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
LatticeECP/EC Family Data Sheet
DDR Strobe (DQS) and
Data (DQ) Pins
[Edge]DQSn
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
Pinout Information