CY7C64713-128AXC Cypress Semiconductor Corp, CY7C64713-128AXC Datasheet - Page 7

• Manufacturer Part Number: CY7C64713-128AXC
• Description: IC MCU USB EZ FX1 16KB 128LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX1™r

Specifications of CY7C64713-128AXC

• Program Memory Type: ROMless
• Package / Case: 128-LQFP
• Applications: USB Microcontroller
• Core Processor: 8051
• Controller Series: CY7C647xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 40
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Processor Series: CY7C64xx
• Core: M8C
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: CY3674
• Minimum Operating Temperature: 0 C
• Cpu Family: FX2LP
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 48MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.45V
• Operating Supply Voltage (min): 3.15V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 128
• Package Type: TQFP
• Controller Family/series: (8051) USB
• Core Size: 8 Bit
• No. Of I/o's: 40
• Ram Memory Size: 16KB
• Cpu Speed: 48MHz
• No. Of Timers: 3
• Embedded Interface Type: I2C, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 428-1681 - KIT USB FX1 DEVELOPMENT BOARD428-1677 - KIT DEVELOPMENT EZ-USB FX2LP428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / Rohs Status: Compliant
• Other names: 428-1678; CY7C64713-128AXC

Table 5. Reset Timing Values
Wakeup Pins
The 8051 puts itself and the rest of the chip into a power down
mode by setting PCON.0 = 1. This stops the oscillator and PLL.
When WAKEUP is asserted by external logic, the oscillator
restarts, after the PLL stabilizes, and then the 8051 receives a
wakeup interrupt. This applies irrespective of whether the FX1 is
connected to the USB or not.
The FX1 exits the power down (USB suspend) state using one
of the following methods:
■
■
■
The second wakeup pin, WU2, can also be configured as a
general purpose I/O pin. This allows a simple external R-C
network to be used as a periodic wakeup source. Note that
WAKEUP is by default active LOW.
Document #: 38-08039 Rev. *F
Power On Reset with crystal
Power On Reset with external
clock
Powered Reset
USB bus activity (if D+/D– lines are left floating, noise on these
lines may indicate activity to the FX1 and initiate a wakeup).
External logic asserts the WAKEUP pin.
External logic asserts the PA3/WU2 pin.
Condition
5 ms
200 μs + Clock stability time
200 μs
FFFF
E200
E1FF
E000
3FFF
0000
*SUDPTR, USB upload/download, I
Data (RD#,WR#)*
Inside FX1
4K FIFO buffers
0.5 KBytes RAM
16 KBytes RAM
Code and Data
(PSEN#,RD#,WR#)*
T
Figure 3. Internal Code Memory, EA = 0.
7.5 KBytes
USB regs and
(RD#,WR#)
RESET
Outside FX1
(Ok to populate
data memory
here—RD#/WR#
strobes are not
active)
(OK to populate
data memory
here—RD#/WR#
strobes are not
active)
40 KBytes
External
Data
Memory
(RD#,WR#)
Data
Program/Data RAM
Size
The FX1 has 16 KBytes of internal program/data RAM, where
PSEN#/RD# signals are internally ORed to allow the 8051 to
access it as both program and data memory. No USB control
registers appear in this space.
Two memory maps are shown in the following diagrams:
■
■
Internal Code Memory, EA = 0
This mode implements the internal 16 KByte block of RAM
(starting at 0) as combined code and data memory. When the
external RAM or ROM is added, the external read and write
strobes are suppressed for memory spaces that exist inside the
chip. This allows the user to connect a 64 KByte memory without
requiring the address decodes to keep clear of internal memory
spaces.
Only the internal 16 KBytes and scratch pad 0.5 KBytes RAM
spaces have the following access:
■
■
■
■
Figure 3
Figure 4
USB download
USB upload
Setup data pointer
I
2
2
C interface boot access
C interface boot load
Internal Code Memory, EA = 0
External Code Memory, EA = 1.
(OK to populate
program
memory here—
PSEN# strobe
is not active)
48 KBytes
External
Code
Memory
(PSEN#)
Code
CY7C64713
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