PNX1501E/G,557 NXP Semiconductors, PNX1501E/G,557 Datasheet - Page 132
![IC MEDIA PROC 266MHZ 456-BGA](/photos/6/76/67605/568-456-bga_sot795-1_sml.jpg)
PNX1501E/G,557
Manufacturer Part Number
PNX1501E/G,557
Description
IC MEDIA PROC 266MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1502EG557.pdf
(828 pages)
Specifications of PNX1501E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.14 V ~ 1.26 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Other names
568-1297
935277747557
PNX1501E/G
935277747557
PNX1501E/G
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Philips Semiconductors
Volume 1 of 1
Table 8: Global Registers
PNX15XX_SER_3
Product data sheet
2:0
Bit
Symbol
VDO_MODE
…Continued
Acces
s
R/W
Value
0
Rev. 3 — 17 March 2006
Description
TFT/QVCP mapping to VDO interface
000*: TFT LCD controller with 24- or 18-bit digital RGB/YUV
video
TFT_DATA[23:0]
TFT_VSYNC
TFT_HSYNC
TFT_DE
TFT_VDDON
TFT_BKLTON
TFT_CLK
In 18-bit mode
VDO_D[28:23]
VDO_D[20:15]
VDO_D[12:7]
In 24-bit mode
VDO_D[28:21]
VDO_D[20:13]
VDO_D[12:5]
001*: Digital ITU 656 YUV 8-/10-bit
QVCP_DATA[9:0] -> VDO_D[28:19]
QVCP_VSYNC
QVCP_HSYNC
QVCP_AUX1
QVCP_CLK
In 8-bit mode YUV[7:0] is mapped to VDO_D[28:21].
QVCP_AUX1 can be programmed to output, a CBLANK signal, a
Field indicator or a video/graphics detector.
010*: Digital 16-bit YUV video
QVCP_DATA[19:12,9:2]
QVCP_VSYNC
QVCP_HSYNC
QVCP_AUX1
QVCP_CLK
Y[7:0] is mapped to VDO_D[20:13]. UV[7:0] is mapped to
VDO_D[28:21].
QVCP_AUX1 can be programmed to output, a CBLANK signal, a
Field indicator or a video/graphics detector.
011*: Digital 20-bit YUV video
QVCP_DATA[19:10,9:0]
QVCP_VSYNC
QVCP_HSYNC
QVCP_AUX1
QVCP_CLK
Y[9:0] is mapped to VDO_D[18:9]. UV[9:0] is mapped to
VDO_D[28:19].
QVCP_AUX1 can be programmed to output, a CBLANK signal, a
Field indicator or a video/graphics detector.
-> VDO_CLK1
-> B[5:0] or V[5:0]
-> B[7:0] or V[5:0]
-> VDO_CLK1
-> VDO_D[29]
-> VDO_D[28:5]
-> VDO_D[30]
-> VDO_D[3]
-> R[5:0] or Y[5:0]
-> G[5:0] or U[5:0]
-> R[7:0] or Y[5:0]
-> G[7:0] or U[5:0]
-> VDO_D[31]
-> VDO_D[31]
-> VDO_D[4]
-> VDO_D[29]
-> VDO_D[30]
Chapter 3: System On Chip Resources
-> VDO_CLK1
-> VDO_CLK1
-> VDO_D[29]
-> VDO_D[31]
-> VDO_D[28:13]
-> VDO_D[30]
-> VDO_D[31]
-> VDO_D[28:9]
-> VDO_D[29]
-> VDO_D[30]
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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