PNX1501E/G,557 NXP Semiconductors, PNX1501E/G,557 Datasheet - Page 26
![IC MEDIA PROC 266MHZ 456-BGA](/photos/6/76/67605/568-456-bga_sot795-1_sml.jpg)
PNX1501E/G,557
Manufacturer Part Number
PNX1501E/G,557
Description
IC MEDIA PROC 266MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1502EG557.pdf
(828 pages)
Specifications of PNX1501E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.14 V ~ 1.26 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Other names
568-1297
935277747557
PNX1501E/G
935277747557
PNX1501E/G
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Philips Semiconductors
Volume 1 of 1
Table 10:
Table 11:
Table 12:
Chapter 24: TM3260 Debug
Table 1:
Table 2:
Table 3:
Table 4:
Table 5:
Chapter 25: I
Table 1:
Table 2:
Table 3:
Table 4:
Table 5:
Table 6:
Table 7:
Chapter 26: Memory Arbiter
Table 1:
Table 2:
Table 3:
Chapter 27: Power Management
Chapter 28: Pixel Formats
Table 1:
Table 2:
Chapter 29: Endian Mode
Table 1:
Table 2:
Table 3:
Table 4:
Table 5:
Table 6:
Table 7:
Table 8:
Table 9:
Table 10:
Table 11:
Chapter 30: DCS Network
Table 1:
Table 2:
PNX15XX_SER_3
Product data sheet
Transmit Status Structure
Transmit Status Information Word
LAN100 Pin Interface to external PHY
JTAG TM3260 Instruction Encoding
Transfer of Data In via JTAG
Register Summary
TM_DBG 1 Registers
Register Summary
IIC Registers
IIC Registers
IIC Registers
Status Codes
IIC Registers
IIC Registers
Peripheral ID and Sub-Arbitration
Register Summary
PMAN (Hub) Arbiter Registers
Native Pixel Format Summary
Alpha Code Value and Pixel Transparency
Memory Result of a Store to Address ‘a’ Instruction
Register Result of an (Unsigned) Load Instruction
Register Result of a (Signed) Load Instruction
Precise Mapping Audio In Sample Time and Bits to Memory Bytes
DTL Interface Rules
32 Bit DTL Interface Byte Address
DTL Interface Rules
DCS Network Data Transfer Rules (32 Bits at-a-time Transfer)
MTL Memory Bus Byte Address
MTL Memory Bus Item DMA Rules
32 Bit PCI Interface Byte Address
DCS Controller_TriMedia Configuration Register Summary
DCS Controller_TriMedia Configuration Registers (Rev 0.32)
JTAG Instruction Encoding
2
C Interface
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29-11
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-4
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-6
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28-2
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Rev. 3 — 17 March 2006
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-73
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30-3
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© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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