PNX1501E/G,557 NXP Semiconductors, PNX1501E/G,557 Datasheet - Page 144
![IC MEDIA PROC 266MHZ 456-BGA](/photos/6/76/67605/568-456-bga_sot795-1_sml.jpg)
PNX1501E/G,557
Manufacturer Part Number
PNX1501E/G,557
Description
IC MEDIA PROC 266MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1502EG557.pdf
(828 pages)
Specifications of PNX1501E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.14 V ~ 1.26 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Other names
568-1297
935277747557
PNX1501E/G
935277747557
PNX1501E/G
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Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
Figure 1:
RESET_IN_N
POR_IN_N
Reset Module Block Diagram
2.1 RESET_IN_N or POR_IN_N?
Reset module
Watch Dog Timer
Interrupt Counter
Figure 1
PNX15xx Series system.
POR_IN_N is meant to be used at power up of the system. By asserting this pin low
as soon as the power sequencing starts ensures limited (if not none) contentions
inside the PNX15xx Series system as well as the PNX15xx Series pin level.
Furthermore by resetting the JTAG state machine the POR_IN_N signal ensures the
PNX15xx Series pins start with the correct mode. This is the cold reset and must
always be connected.
RESET_IN_N is complementary to the POR_IN_N signal and could be referenced as
the warm reset. A typical application where the feature can be used is a system board
where the JTAG boundary scan is to be used to reset PNX15xx Series without
executing a full power down and up sequence. In this case the PNX15xx Series JTAG
state machine should not be reset. Since all PNX15xx Series pins can become
outputs in boundary scan mode it is possible to assert a 0 on the RESET_IN_N pin
while the PNX15xx Series system is still under the control of the internal JTAG state
machine. This pin may not be connected at board level.
RST_CAUSE
Bus Interface
RST_CTL
Registers
shows an overview of the Reset module connections to the remaining of the
sys_rst_out_n
(to off-chip
devices)
Rev. 3 — 17 March 2006
peri_rst_n
DCS Bus
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Test block
TM3260
int_rst_n
Module 2
Module N
Module 1
int_rst1_n
int_rst2_n
int_rst_n
int_rst_n
jtag_rst_n
PNX15xx Series
Chapter 4: Reset
4-3
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