Z9035112PSC Zilog, Z9035112PSC Datasheet - Page 12

• Manufacturer Part Number: Z9035112PSC
• Description: IC 64KW DIG TV CTRL OTP 52-SDIP
• Manufacturer: Zilog

Specifications of Z9035112PSC

• Applications: TV Controller
• Core Processor: Z8
• Program Memory Type: OTP (128 kB)
• Controller Series: Digital Television Controller (DTC)
• Ram Size: 2K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 25
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 52-SDIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

•
The Z90356 Television Controller with OSD is based on ZiLOG’s Z89C00 RISC
processor core. The Z89C00 is a second-generation, 16-bit, fractional, two’s complement
CMOS Digital Signal Processor (DSP). Most instructions are accomplished in a single
clock cycle. This processor features a 24-bit Arithmetic Logic Unit (ALU) and a 24-bit
Accumulator. The processor also contains a six-level stack and three vectored interrupts.
The Z90356 contains 64 KWords of program ROM and 1 KWord of on-chip data RAM.
Program ROM space can hold an unlimited number of characters with a 16x16, 16x18,
and 16x20 programmable matrix in relocated Character Generation ROM (CGROM),
which is only restricted by the available ROM. In addition, the Z90356 contains four
external register banks with eight registers each. Additional Control Registers (AR) are
available to control new peripheral blocks like palette banks and memory management.
An internal 24-MHz/2 system clock has a Phase Lock Loop (PLL) driven by an external
32.768-KHz crystal.
A six-channel, 4-bit Analog to Digital Converter (ADC) supports the following:
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•
•
Six Pulse Width Modulator (PWM) outputs allow low-cost digital-to-analog conversion
(DAC). The PWMs have 8-bit resolution to control video and audio attributes.
A Master/Slave I
interconnect to common peripheral functions.
Twenty-five programmable I/O pins provide flexibility for other digital input/output
functions.
An IR (InfraRed) remote capture register facilitates reliable remote data capture.
On-chip Horizontal Synchronization (H
circuits generate a video time base (typically used for VCR and set-top applications) in the
absence of an available video signal.
Micro-programmable OSD generation logic provides flexibility to tailor OSD features and
functions. In addition to normal OSD functions, Closed Caption is supported in
accordance with FCC Report and Order on GEN Docket No. 91-1, dated April 12, 1991.
Expanded Data Service (XDS) capability is supported as well.
The Z90356 is packaged in a 52-pin SDIP package.
The Z90356 incorporates the ROM code developed by the customer with the
Z90351. Customer code is masked into both program ROM and CGROM.
Analog front panel control
Audio level input
Vertical Blanking Interval (VBI) data capture
The Z89C00 multiplier is disabled in the Z90356 controller.
2
C (Inter Integrated Circuit) bus interface provides serial system
SYNC
) and Vertical Synchronization (V
SYNC
)