Z9035112PSC Zilog, Z9035112PSC Datasheet - Page 72

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Z9035112PSC

Manufacturer Part Number
Z9035112PSC
Description
IC 64KW DIG TV CTRL OTP 52-SDIP
Manufacturer
Zilog
Datasheet

Specifications of Z9035112PSC

Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (128 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
2K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
25
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
52-SDIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z9035112PSC
Quantity:
774
Part Number:
Z9035112PSC
Manufacturer:
ZILOG
Quantity:
260
The H_position field defines the delay between when the Z90356 receives an H-sync and
when the H-sync interrupt is executed. Because the On-Screen Display is controlled by
software this delay allows fine tuning for On-Screen Display centering. At Power On
Reset (POR) this value is in an unknown state. If this value is set to 0x0, neither the
H
delay values are between 0x1 and 0xF. Valid delay values produce a delay according to
the following equation:
For example, an H_position setting of 0xF produces a delay of 67 system clock cycles
after the trailing edge of H
The No_switch bit determines if the system clock is permanently set to the Primary VCO
(PVCO) or allowed to switch between PVCO and the Secondary VCO (SVCO). This bit is
set to 1 (NO clock switching) at power up reset.
Caution: After the system has been switched to fast (12 MHz) clock both signals feeding
into this switch MUST be PVCO BEFORE the switch setting is changed. Otherwise a
short system clock can result which causes the processor to run at a higher frequency than
specified. The instruction fetched from memory, at the location with the out-of-spec
frequency, can be corrupted!
To ensure safe clocks, the following practices are recommended:
1.
SYNC
11 + 4 * (H_position - 1)
11 + 4 * (15 - 1) = 67
Set the No_switch to the required setting before switching from the 32.768 kHz to
the fast (12 MHz) clock and leave it there permanently.
interrupt nor clock switching can execute. To receive an H
----------5-----
-----------4----
------------3210
SYNC
.
SYNC
interrupt, valid

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