Z9035112PSC Zilog, Z9035112PSC Datasheet - Page 21

• Manufacturer Part Number: Z9035112PSC
• Description: IC 64KW DIG TV CTRL OTP 52-SDIP
• Manufacturer: Zilog

Specifications of Z9035112PSC

• Applications: TV Controller
• Core Processor: Z8
• Program Memory Type: OTP (128 kB)
• Controller Series: Digital Television Controller (DTC)
• Ram Size: 2K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 25
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 52-SDIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

External registers reside on the chip and are used to control the operation of all the
peripheral modules in the device. By reading or writing to the fields in the external
registers, the user can interact with the peripheral devices on the chip.
BUS
a virtual register. (Physical RAM does not exist on the chip.)
Dn:b
pointers to locations in program memory. The programmer decides which location to
choose two bits from in the status register and which two bits in the operand. This means
only the lower 16 possible locations in RAM can be specified. At any one time there are
eight usable pointers, four per bank, and the four pointers are in consecutive locations in
RAM.
For example, if S3/S4 = 01 in the status register, then D0:0/D1:0/D2:0/D3:0 refers to
locations 4/5/6/7 in RAM bank 0.
Additional Control Registers (AR) control new peripheral blocks like palette banks and
memory management. To activate ARs, R0(1)<b> must be set to “1.” ARs can be disabled
by setting R0(1)<b> = 0, (POR) for software backward compatibility or if access to RAM
location 1FFh is required.
The 128 eight-bit control registers (referred as AR or ARx<y:z>) use RAM-mapped I/O
access. Location 1FFh in RAM is used to address up to 128 byte-width ARs. The AR
number and written data are encoded into the data field as illustrated in Figure 4.
When writing to address 1FFh, the Data Write Bit (DWB) and AR number are latched,
depending on whether the DWB data field is either written to the selected port (latched) or
discarded (not latched). The AR number and corresponding data are read after reading
from the previously latched DWB address 1FFh.
To write to the AR, the data must be written to address 1FFh; DWB must be set to “1,” the
port number must be specified in bits 8–14, and actual data must be specified in bits 0–7.
is a read-only register that, when accessed, returns the contents of the D-Bus. It is
These eight data pointers refer to possible locations in RAM that can be used as
When the data pointers are being written to, a number is actually being loaded to
Data RAM, so they can be used as a limited method for writing to RAM.