Z9035112PSC Zilog, Z9035112PSC Datasheet - Page 66
Z9035112PSC
Manufacturer Part Number
Z9035112PSC
Description
IC 64KW DIG TV CTRL OTP 52-SDIP
Manufacturer
Zilog
Datasheet
1.Z9035112PSC.pdf
(186 pages)
Specifications of Z9035112PSC
Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (128 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
2K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
25
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
52-SDIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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3.
4.
5.
To switch from the 12-MHz SCLK to 32.768 kHz, use the following procedure:
1.
2.
3.
4.
Wait for one second (1s) for the 12-MHz PLL to stabilize (about 50000 clock
cycles). The delay depends on the external PLL filter and CAN vary significantly.
Switch the SCLK to a fast clock (set Fast/Slow bit R1(1)<0> to 1).
Simultaneously set the H_Position field R6(1)<3:0> to 0FH and the No_Switch
field R6(1)<4> to 1 (no clock switch).
Switch the SCLK to a 32.768-kHz clock (set Fast/Slow bit R1(1)<0> to 0).
Wait for more than R2(0)<7:0> + 256 clock cycles (approximately 32 mS) for the
SCLK to be switched.
Set the HSYNC_DELAY field R6(1)<3:0> to 0FH.
Disable the primary and secondary VCOs (set the Fast_enable bit R1(1)<1> to 0).
fedcba987-------
---------65432--
--------------1-
---------------0
0
0
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