Z84C2008PEG Zilog, Z84C2008PEG Datasheet - Page 297

• Manufacturer Part Number: Z84C2008PEG
• Description: IC 8MHZ Z80 CMOS PIO 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z84C2008PEG

• Processor Type: Z80
• Features: Low Power CMOS
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Cpu Speed: 8MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: -40°C To +100°C
• Svhc: No SVHC (18-Jun-2010)
• Rohs Compliant: Yes
• Processor Series: Z84C2xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Base Number: 84
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Operation:
Op Code:
Description: The contents of register C are placed on the bottom half (A0 through A7)
Condition Bits Affected:
UM008005-0205
(HL) ← (C), B ← 131, HL ← HL1
INDR
of the address bus to select the I/O device at one of 256 possible ports.
Register B is used as a byte counter, and its contents are placed on the top
half (A8 through A15) of the address bus at this time. Then one byte from
the selected port is placed on the data bus and written to the CPU. The
contents of the HL register pair are placed on the address bus and the
input byte is written to the corresponding location of memory. Then HL
and the byte counter are decremented. If decrementing causes B to go to
zero, the instruction is terminated. If B is not zero, the PC is decremented
by two and the instruction repeated. Interrupts are recognized and two
refresh cycles are executed after each data transfer.
When B is set to zero prior to instruction execution, 256 bytes of data are
input.
If B ≠ 0
If B = 0:
S is unknown
Z is set
H is unknown
P/V is unknown
N is set
1
1
1
0
M Cycles
5
M Cycles
4
1
1
0
1
1
1
T States
21 (4, 5, 3, 4, 5)
T States
16 (4, 5, 3, 4)
INDR
1
0
0
1
1
0
ED
BA
4 MHz E.T.
4 MHz E.T.
5.25
4.00
Z80 Instruction Set
User’s Manual
Z80 CPU
277