Z84C2008PEG Zilog, Z84C2008PEG Datasheet - Page 46

• Manufacturer Part Number: Z84C2008PEG
• Description: IC 8MHZ Z80 CMOS PIO 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z84C2008PEG

• Processor Type: Z80
• Features: Low Power CMOS
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Cpu Speed: 8MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: -40°C To +100°C
• Svhc: No SVHC (18-Jun-2010)
• Rohs Compliant: Yes
• Processor Series: Z84C2xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Base Number: 84
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26
UM008005-0205
Z80 CPU
User’s Manual
Interrupt
Service
Routine
Starting
Address
Table
because the pointer is used to get two adjacent bytes to form a complete 16-
bit service routine starting address and the addresses must always start in
even locations.
Figure 16. Mode 2 Interrupt Response Mode
The first byte in the table is the least-significant (low order portion of the
address). The programmer must complete this table with the correct
addresses before any interrupts are accepted.
The programmer can change this table by storing it in Read/Write Memory,
which also allows individual peripherals to be serviced by different service
routines.
When the interrupting device supplies the lower portion of the pointer, the
CPU automatically pushes the program counter onto the stack, obtains the
starting address from the table, and performs a jump to this address. This
mode of response requires 19 clock periods to complete (seven to fetch the
lower eight bits from the interrupting device, six to save the program
counter, and six to obtain the jump address).
The Z80 peripheral devices include a daisy-chain priority interrupt structure
that automatically supplies the programmed vector to the CPU during
interrupt acknowledge. Refer to the Z80 CPU Peripherals User Manual for
more complete information.
Low Order
High Order
Starting Address
Pointed to by:
I Register
Contents
Seven Bits From
Peripheral
0
Overview