MPC8555ECPXAJD Freescale Semiconductor, MPC8555ECPXAJD Datasheet - Page 11

• Manufacturer Part Number: MPC8555ECPXAJD
• Description: IC MPU POWERQUICC III 783-FCPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8555ECPXAJD

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 533MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• For Use With: MPC8555CDS - BOARD EVALUATION CDS FOR 8555CWH-PPC-8555N-VX - BOARD EVAL QUICCSTART MPC8555CWH-PPC-8540N-VE - KIT EVAL SYSTEM MPC8540CWH-PPC-8555N-VE - EVALUATION SYSTEM QUICC MPC8555E
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Figure 2
The MPC8555E core voltage must always be provided at nominal 1.2 V (see
recommended core voltage). Voltage to the processor interface I/Os are provided through separate sets of
supply pins and must be provided at the voltages shown in
respect to the associated I/O supply voltage. OV
circuits and satisfy appropriate LVCMOS type specifications. The DDR SDRAM interface uses a
single-ended differential receiver referenced the externally supplied MV
GV
Freescale Semiconductor
DD
/2) as is appropriate for the SSTL2 electrical signaling standard.
MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
shows the undershoot and overshoot voltages at the interfaces of the MPC8555E.
V
V
Note:
IH
1. Note that t
IL
Figure 2. Overshoot/Undershoot Voltage for GV
G/L/OV
G/L/OV
GND – 0.3 V
GND – 0.7 V
G/L/OV
DD
DD
SYS
+ 20%
+ 5%
GND
refers to the clock period associated with the SYSCLK signal.
DD
DD
and LV
Not to Exceed 10%
Table
of t
DD
SYS
based receivers are simple CMOS I/O
2. The input voltage threshold scales with
1
DD
/OV
REF
DD
signal (nominally set to
/LV
Table 2
DD
Electrical Characteristics
for actual
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