MPC8555ECPXAJD Freescale Semiconductor, MPC8555ECPXAJD Datasheet - Page 24

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MPC8555ECPXAJD

Manufacturer Part Number
MPC8555ECPXAJD
Description
IC MPU POWERQUICC III 783-FCPBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8555ECPXAJD

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
533MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
For Use With
MPC8555CDS - BOARD EVALUATION CDS FOR 8555CWH-PPC-8555N-VX - BOARD EVAL QUICCSTART MPC8555CWH-PPC-8540N-VE - KIT EVAL SYSTEM MPC8540CWH-PPC-8555N-VE - EVALUATION SYSTEM QUICC MPC8555E
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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Ethernet: Three-Speed, MII Management
8.2
The AC timing specifications for GMII, MII, TBI, RGMII, and RTBI are presented in this section.
8.2.1
This section describes the GMII transmit and receive AC timing specifications.
8.2.2
Table 20
Figure 7
24
At recommended operating conditions with LV
GTX_CLK clock period
GTX_CLK duty cycle
GMII data TXD[7:0], TX_ER, TX_EN setup time
GTX_CLK to GMII data TXD[7:0], TX_ER, TX_EN delay
GTX_CLK data clock rise and fall times
Notes:
1. The symbols used for timing specifications herein follow the pattern t
2. Signal timings are measured at 0.7 V and 1.9 V voltage levels.
3. Guaranteed by characterization.
4. Guaranteed by design.
for inputs and t
transmit timing (GT) with respect to the t
signals (D) reaching the valid state (V) to state or setup time. Also, t
to the t
time. Note that, in general, the clock reference symbol representation is based on three letters representing the clock of a
particular functional. For example, the subscript of t
the latter convention is used with the appropriate letter: R (rise) or F (fall).
MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
GTX
shows the GMII transmit AC timing diagram.
provides the GMII transmit AC timing specifications.
GMII, MII, TBI, RGMII, and RTBI AC Timing Specifications
clock reference (K) going to the high state (H) relative to the time date input signals (D) going invalid (X) or hold
GMII AC Timing Specifications
GMII Transmit AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
GTX_CLK
Parameter/Condition
TXD[7:0]
TX_EN
TX_ER
Table 20. GMII Transmit AC Timing Specifications
Figure 7. GMII Transmit AC Timing Diagram
t
GTXH
t
DD
GTKHDV
GTX
of 3.3 V ± 5%.
t
clock reference (K) going to the high state (H) relative to the time date input
GTX
GTX
represents the GMII(G) transmit (TX) clock. For rise and fall times,
t
GTXR
t
Symbol
GTXH
t
t
t
GTKHDV
GTXF
GTKHDX
3
t
GTX
,
GTKHDX
t
/t
GTXR
t
GTKHDX
GTX
for outputs. For example, t
(first two letters of functional block)(signal)(state) (reference)(state)
1
2,4
symbolizes GMII transmit timing (GT) with respect
t
GTXR
Min
2.5
0.5
40
Typ
8.0
GTKHDV
Freescale Semiconductor
symbolizes GMII
Max
5.0
1.0
60
Unit
ns
ns
ns
ns
%

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