MC68LC060RC50 Freescale Semiconductor, MC68LC060RC50 Datasheet - Page 12

• Manufacturer Part Number: MC68LC060RC50
• Description: IC MPU 32BIT 68K 50MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68LC060RC50

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

7.7
7.7.1
7.7.2
7.7.3
7.7.4
7.7.5
7.7.6
7.7.7
7.8
7.8.1
7.8.1.1
7.8.1.2
7.8.1.3
7.8.2
7.8.2.1
7.9
7.9.1
7.9.2
7.9.3
7.10
7.11
7.11.1
7.11.2
7.11.3
7.12
7.13
7.14
7.14.1
7.14.2
7.14.3
8.1
8.2
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.2.7
8.2.8
8.2.9
8.2.10
xiv
Table of Contents
Processor Data Transfers........................................................................... 7-12
Acknowledge Cycles................................................................................... 7-32
Bus Exception Control Cycles .................................................................... 7-46
Bus Synchronization ................................................................................... 7-52
Bus Arbitration ............................................................................................ 7-52
Special Modes of Operation ....................................................................... 7-74
Exception Processing Overview ................................................................... 8-1
Integer Unit Exceptions................................................................................. 8-4
Bus Snooping Operation............................................................................ 7-68
Reset Operation......................................................................................... 7-71
Byte, Word, and Long-Word Read Transfer Cycles ................................. 7-12
Line Read Transfer................................................................................... 7-15
Byte, Word, and Long-Word Write Cycles................................................ 7-20
Emulating CAS2 and CAS Misaligned...................................................... 7-31
Using CLA to Increment A3 and A2.......................................................... 7-32
Breakpoint Acknowledge Cycle ................................................................ 7-36
Bus Errors................................................................................................. 7-46
Retry Operation ........................................................................................ 7-48
Double Bus Fault ...................................................................................... 7-51
MC68040-Arbitration Protocol (BB Protocol)............................................ 7-53
MC68060-Arbitration Protocol (BTT Protocol).......................................... 7-58
External Arbiter Considerations................................................................ 7-65
Acknowledge Termination Ignore State Capability................................... 7-74
Acknowledge Termination Protocol .......................................................... 7-76
Extra Data Write Hold Time Mode............................................................ 7-76
Access Error Exception .............................................................................. 8-5
Address Error Exception............................................................................. 8-7
Instruction Trap Exception.......................................................................... 8-7
Illegal Instruction and Unimplemented Instruction Exceptions ................... 8-8
Privilege Violation Exception .................................................................... 8-10
Trace Exception........................................................................................ 8-10
Format Error Exception ............................................................................ 8-11
Breakpoint Instruction Exception .............................................................. 8-11
Interrupt Exception ................................................................................... 8-12
Reset Exception ....................................................................................... 8-14
Line Write Cycles..................................................................................... 7-25
Locked Read-Modify-Write Cycles .......................................................... 7-28
Interrupt Acknowledge Cycles ................................................................. 7-32
Interrupt Acknowledge Cycle (Terminated Normally) ............................. 7-35
Autovector Interrupt Acknowledge Cycle ............................................... 7-35
Spurious Interrupt Acknowledge Cycle .................................................. 7-35
LPSTOP Broadcast Cycle ...................................................................... 7-38
Exception Processing
M68060 USER’S MANUAL
Section 8
MOTOROLA