MC68LC060RC50 Freescale Semiconductor, MC68LC060RC50 Datasheet - Page 281

• Manufacturer Part Number: MC68LC060RC50
• Description: IC MPU 32BIT 68K 50MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68LC060RC50

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

IEEE 1149.1 Test (JTAG) and Debug Pipe Control Modes
9-20
attribute INSTRUCTION_CAPTURE of MC68060: entity is "0101";
attribute INSTRUCTION_PRIVATE of MC68060:entity is "PRIVATE";
attribute REGISTER_ACCESS of MC68060:entity is
attribute IDCODE_REGISTER of MC68060: entity is
attribute BOUNDARY_CELLS of MC68060:entity is
"BC_1, BC_2, BC_4";
attribute BOUNDARY_LENGTH of MC68060:entity is 214;
attribute BOUNDARY_REGISTER of MC68060:entity is
--num cell
"0
"1
"2
"3
"4
"5
"6
"7
"8
"9
"10
"11
"12
"13
"14
"15
"16
"17
"18
"19
--num
"20
"21
"22
"23
"24
"25
"26
"27
"28
"29
"30
"31
"32
"33
"BOUNDARY (LPSAMPLE)";
"0001" &
"000001" &
"0000110000" &
"00000001110" & -- Motorola
"1";
(BC_1, D(0),
(BC_2, D(0),
(BC_1, D(1),
(BC_2, D(1),
(BC_2, *,
(BC_1, D(2),
(BC_2, D(2),
(BC_1, D(3),
(BC_2, D(3),
(BC_1, D(4),
(BC_2, D(4),
(BC_1, D(5),
(BC_2, D(5),
(BC_2, *,
(BC_1, D(6),
(BC_2, D(6),
(BC_1, D(7),
(BC_2, D(7),
(BC_1, D(8),
(BC_2, D(8),
(BC_1, D(9),
(BC_2, D(9),
(BC_2, *,
(BC_1, D(10),
(BC_2, D(10),
(BC_1, D(11),
(BC_2, D(11),
(BC_1, D(12),
(BC_2, D(12),
(BC_1, D(13),
(BC_2, D(13),
(BC_2, *,
(BC_1, D(14),
(BC_2, D(14),
cell port
port
-- version
-- design center
-- sequence number
-- required by 1149.1
function safe
input,
output3,
input,
output3,
control,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
control,
input,
output3,
input,
output3,
input,
output3,
function safe
input,
output3,
control,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
control,
input,
output3,
M68060 USER’S MANUAL
X),
X,
X),
X,
0),
X),
X,
X),
X,
X),
X,
X),
X,
0),
X),
X,
X),
X,
X),
X,
X),
X,
0),
X),
X,
X),
X,
X),
X,
X),
X,
0),
X),
X,
ccell dsval rslt
ccell dsval rslt
" &
" &
" & -- d[3:0]
" &
" &
" &
" &
" & -- d[7:4]
" &
" &
" &
" &
" & -- d[11:8]
" &
" &
" &
" &
" & -- d[15:12]
" &
13,
13,
13,
13,
22,
22,
22,
22,
31,
31,
31,
4,
4,
4,
4,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
MOTOROLA