CS4271-CZZ Cirrus Logic Inc, CS4271-CZZ Datasheet - Page 42

• Manufacturer Part Number: CS4271-CZZ
• Description: IC CODEC AUD 24BIT 114DB 28TSSOP
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS4271-CZZ

• Package / Case: 28-TSSOP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 108 / 114
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.1 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 192 KSPS
• Interface Type: Serial (I2C, I2S, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC/2 DAC
• Thd Plus Noise: - 98 dB ADC / - 100 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1003 - EVAL BOARD CS4271 STEREO CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1041-5

8.4
8.5
8.5.1
8.5.2
42
MUTE
7
DAC Channel A Volume Control - Address 04h
DAC Channel B Volume Control - Address 05h
Function:
Function:
ATAPI3
Mute (Bit 7)
Volume Control (Bits 6:0)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
See 8.5 DAC Channel B Volume Control - Address 05h
The DAC output will mute when this bit is set. Though this bit is active high, it should be noted that
the MUTEC pins are active low. The common mode voltage on the output will be retained when this
bit is set. The muting function is effected, similar to attenuation changes, by the Soft and ZeroCross
bits in the Volume and Mixing Control register. The MUTEC pin for the respective channel will become
active during the mute period if the MUTE bit is set. Both the AMUTEC and BMUTEC will become
active if either MUTE register is enabled and the MUTECB=A bit (register 7) is enabled.
The digital volume control allows the user to attenuate the signal in 1 dB increments from 0 to -127 dB.
Volume settings are decoded as shown in Table 16. The volume changes are implemented as dictat-
ed by the Soft and ZeroCross bits in the DAC Volume & Mixing Control register (see section 8.3.2).
VOL6
6
ATAPI2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Binary Code
0000000
0010100
0101000
1011010
0111100
Table 16. Digital Volume Control Example Settings
VOL5
ATAPI1
5
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Table 15. ATAPI Decode
ATAPI0
VOL4
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
4
Decimal Value
20
40
60
90
0
VOL3
3
a[(L+R)/2]
a[(L+R)/2]
a[(L+R)/2]
a[(L+R)/2]
AOUTA
MUTE
MUTE
MUTE
MUTE
aR
aR
aR
aR
aL
aL
aL
aL
Volume Setting
VOL2
-20 dB
-40 dB
-60 dB
-90 dB
2
0 dB
b[(L+R)/2]
b[(L+R)/2]
b[(L+R)/2]
b[(L+R)/2]
VOL1
AOUTB
MUTE
MUTE
MUTE
MUTE
1
bR
bR
bR
bR
bL
bL
bL
bL
CS4271
VOL0
DS592F1
0