UDA1355H/N2,557 NXP Semiconductors, UDA1355H/N2,557 Datasheet - Page 11

• Manufacturer Part Number: UDA1355H/N2,557
• Description: IC CODEC STER/SUDIO SPDIF 44QFP
• Manufacturer: NXP Semiconductors
• Type: Stereo Audior

Specifications of UDA1355H/N2,557

• Data Interface: I²C, Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 97 / 98
• Voltage - Supply, Analog: 2.7 V ~ 5.5 V
• Voltage - Supply, Digital: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935271552557

NXP Semiconductors
• Set two times 40 bits of channel status bits of the SPDIF
• Select one of four SPDIF input sources
• Enable digital mixer inside interpolator
• Control mute and mixer volumes of digital mixer
• Selection of filter mode and settings of treble and bass
• Volume settings of interpolator
• Selection of soft mute via cosine roll-off (only effective in
• Selection of de-emphasis
• Enable and control of digital mixer inside interpolator.
The readable settings are:
• Mute status of interpolator
• PLL lock and adaptive lock
• Two times 40 bits of channels status bits of the SPDIF
7.3
The UDA1355H has two clock systems.
The first system uses an external crystal of 12.288 MHz to
generate the audio related system clocks. Only a crystal
with a frequency of 12.288 MHz is allowed.
The second system is a PLL which locks on the SPDIF or
incoming digital audio signal (e.g. I
the system clock.
7.3.1
The crystal oscillator and the on-chip PLL and divider
circuit can be used to generate internal and external clock
signals related to standard audio sampling frequencies
(such as 32, 44.1 and 48 kHz including half and double of
these frequencies).
The audio frequencies supported in either microcontroller
mode or static mode are given in Table 3.
2003 Apr 10
output
boost for the interpolator (DAC) section
L3-bus control mode) and bypass of auto mute
input signal.
Stereo audio codec with SPDIF interface
Clock systems
C
RYSTAL OSCILLATOR CLOCK SYSTEM
2
S-bus) and recovers
11
Table 3 Output frequencies
Remarks:
• If an application mode is selected which does not need
• If no accurate output frequency is needed, the crystal
• Instead of the crystal, a 12.288 MHz system clock can
The block diagram of the crystal oscillator and the PLL
circuit is given in Fig.3.
32 kHz
44.1 kHz
48 kHz
a crystal oscillator, the crystal oscillator cannot be
omitted. The reason is that the interpolator switches to
the crystal clock when an SPDIF input signal is
removed. This switch prevents the noise shaper noise
from moving inside the audio band as the PLL gradually
decreases in frequency.
can be replaced with a resonator.
be applied to pin XTALIN.
BASIC AUDIO
FREQUENCY
256 × 16 kHz
384 × 16 kHz
256 × 32 kHz
384 × 32 kHz
256 × 64 kHz
384 × 64 kHz
256 × 22.05 kHz
384 × 22.05 kHz
256 × 44.1 kHz
384 × 44.1 kHz
256 × 88.2 kHz
384 × 88.2 kHz
256 × 24 kHz
384 × 24 kHz
256 × 48 kHz
384 × 48 kHz
256 × 96 kHz
384 × 96 kHz
CONTROLLER
MICRO-
MODE
OUTPUT FREQUENCY
Preliminary specification
UDA1355H
256 × 32 kHz
256 × 44.1 kHz
256 × 48 kHz
STATIC MODE