UDA1355H/N2,557 NXP Semiconductors, UDA1355H/N2,557 Datasheet - Page 56

• Manufacturer Part Number: UDA1355H/N2,557
• Description: IC CODEC STER/SUDIO SPDIF 44QFP
• Manufacturer: NXP Semiconductors
• Type: Stereo Audior

Specifications of UDA1355H/N2,557

• Data Interface: I²C, Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 97 / 98
• Voltage - Supply, Analog: 2.7 V ~ 5.5 V
• Voltage - Supply, Digital: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935271552557

NXP Semiconductors
12.2.5
Table 67 Register address 50H
Table 68 Description of register bits (address 50H)
2003 Apr 10
Symbol
Default
Symbol
Default
15 to 9 −
2 to 0
Stereo audio codec with SPDIF interface
BIT
BIT
BIT
8
7
6
5
4
3
SPDIF
SPDO_VALID
−
L_r_copy
−
PON_SPDO
DIS_SPDO
SPDOUT_SEL[2:0]
15
−
0
7
−
0
SYMBOL
OUTPUT SETTINGS
L_r_copy
14
−
0
6
1
13
reserved
SDPDIF output valid. If this bit is logic 0 then the SPDIF output is invalid; if this bit is
logic 1 then the SPDIF output is valid.
reserved
SPDIF channel status copy. If this bit is logic 0 then the status bits of the left channel
are not copied to the right channel; if this bit is logic 1 then the status bits of the left
channel are copied to the right channel.
reserved
Power control of SPDIF output. If this bit is logic 0 then the SPDIF output is switched
to Power-down mode; if this bit is logic 1 then the SPDIF output is switched to
power-on mode.
SPDIF encoder enable. If this bit is logic 0 then the SPDIF encoder is enabled; if this
bit is logic 1 then the SPDIF encoder is disabled.
SPDIF output source selector. Value to select the input source for SPDIF output.
The selection option to select the SPDIF input just after the slicer was already there.
Added is an independent selection of the input signals SPDIF0 to SPDIF3:
−
0
5
−
0
000 = ADC
001 = I
010 = not used
011 = interpolator mix output
100 = SPDIF0 loop through
101 = SPDIF1 loop through
110 = SPDIF2 loop through
111 = SPDIF3 loop through
PON_SPDO DIS_SPDO SPDOUT_SEL2 SPDOUT_SEL1 SPDOUT_SEL0
2
S-bus input
12
−
0
4
1
11
−
0
3
0
56
DESCRIPTION
10
−
0
2
1
9
−
0
1
0
Preliminary specification
UDA1355H
SPDO_ VALID
8
0
0
0