AD1986AJSTZ Analog Devices Inc, AD1986AJSTZ Datasheet - Page 39

• Manufacturer Part Number: AD1986AJSTZ
• Description: IC CODEC HD AUDIO AC'97 48LQFP
• Manufacturer: Analog Devices Inc
• Series: SoundMAX®r
• Type: Audio Codec '97, HDr

Specifications of AD1986AJSTZ

• Data Interface: Serial
• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 6
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 85 / 91
• Voltage - Supply, Analog: 4.5 V ~ 5.5 V
• Voltage - Supply, Digital: 2.97 V ~ 3.63 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

JACK SENSE (REGISTER 0x72)
All register bits are read/write except for JS0ST and JS1ST, which are read only. Important: Refer to Table 103 to understand how
JACK_SENSE_A and JACK_SENSE_B codec pins translate to JS1and JS0.
Reg
0x72
Table 103.
Register
JS0INT
(JS0
Interrupt
Status)
JS1INT
(JS1
Interrupt
Status)
JS0ST (RO)
(JS0 State)
JS1ST (RO)
(JS1 State)
JS0MD
(JS0 Mode)
JS1MD
(JS1 Mode)
JS0EQB
(JS0 EQ
Bypass
Enable)
JS1EQB
(JS1 EQ
Bypass
Enable)
Name
Jack
Sense
Function
Indicates JS0 has generated an interrupt. Remains set until the software services JS0 interrupt; that is, JS0 ISR should clear
this bit by writing a 0 to it.
Interrupts are generated by valid state changes of JS pins.
Interrupt to the system is actually an OR combination of this bit and JS3 JS0 INT.
The interrupt implementation path is selected by the INTS bit (Register 0x74).
It is also possible to generate a software system interrupt by writing a 1 to this bit.
JS0INT
0
1
Indicates JS1 has generated an interrupt. Remains set until the software services JS1 interrupt; that is, JS1 ISR should clear
this bit by writing a 0 to it. See the JS0INT description above for additional details.
JS1INT
0
1
This bit always reports the logic state of JS0.
On MIC jack sensing, depending on the applications circuit, the logic state for jack sense pins can be the opposite to that on
other jacks. Software needs to be aware that this interprets the JS event as a plug in the out event.
JS0ST
0
1
This bit always reports the logic state of JS1. MIC jack sensing, depending on the applications circuit, the logic state for JS
pins can be the opposite to the other jacks.
JS1ST
0
1
This bit selects the operation mode for JS0.
JS0MD
0
1
This bit selects the operation mode for JS1.
JS1MD
0
1
This bit enables JS0 to control the EQ bypass. When this bit is set to 1, JS0 = 1 will cause the EQ to be bypassed.
JS0EQB
0
1
This bit enables JS1 to control the EQ bypass. When this bit is set to 1, JS1=1 will cause the EQ to be bypassed.
JS1EQB
0
1
D15
JS1
SPRD
D14
JS1
DMX
D13
JS0
DMX
Read
JS0 did not generate interrupt
JS0 generated interrupt
Read
JS1 did not generate interrupt
JS1 generated interrupt
Function
JS0 is low (0)
JS0 is high (1)
Function
JS1 is low (0)
JS is high (1)
Function
Jack sense mode—JS0INT must be polled by software
Interrupt mode—codec will generate an interrupt on JS0 event
Function
Jack sense mode—JS1INT must be polled by software
Interrupt mode—codec will generate an interrupt on JS1 event
Function
JS0 does not affect EQ
JS0 = 1 will cause the EQ to be bypassed
Function
JS1 does not affect EQ
JS1 = 1 will cause the EQ to be bypassed
D12
JSMT
2
D11
JSMT
1
D10
JSMT
0
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D9
JS1
EQB
D8
JS0
EQB
D7
x
D6
x
D5
JS1
MD
D4
JS0
MD
D3
JS1
ST
D2
JS0
ST
JS1
INT
D1
Default
Write
No operation
Clears JS0INT bit
Write
No operation
Clears JS1INT
Default
Default
Default
Default
D0
JS0
INT
AD1986A
Default
0x0000