AD1986AJSTZ Analog Devices Inc, AD1986AJSTZ Datasheet - Page 43

• Manufacturer Part Number: AD1986AJSTZ
• Description: IC CODEC HD AUDIO AC'97 48LQFP
• Manufacturer: Analog Devices Inc
• Series: SoundMAX®r
• Type: Audio Codec '97, HDr

Specifications of AD1986AJSTZ

• Data Interface: Serial
• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 6
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 85 / 91
• Voltage - Supply, Analog: 4.5 V ~ 5.5 V
• Voltage - Supply, Digital: 2.97 V ~ 3.63 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MISC CONTROL BITS 1 (REGISTER 0x76)
Reg
0x76
Table 106.
Register
MBG [1:0]
(MIC Boost Gain Select
Register)
LISEL [1:0]
(LINE_IN Selector)
SRU
(Sample Rate Unlock)
SOSEL
(Surround Amplifier
Input Selection)
2CMIC
(2-Channel MIC Select)
SPRD
(Spread Enable)
CLDIS
(C/LFE Output Enable)
Name
Misc
Control
Bits 1
D15
DACZ
D14
AC97NC MSPLT
Function
These two bits allow changing both MIC preamp gain blocks from the nominal 20 dB gain boost. Both MIC_1/2
and MIC_2 preamps will be set to the same selected gain. This gain setting takes affect only while Bit D6 (M20)
on the MIC volume register (0x0E) is set to 1, otherwise the MIC boost blocks have a gain of 0 dB.
MGB [1:0]
00
01
10
11
Selects the source of the internal LINE_IN signals.
LISEL [1:0]
00
01
1x
Controls all DAC sample rate locking.
SRU
0
1
Selects either the surround DAC or analog mixer as the source driving the SURROUND output pin amplifier.
SOSEL
0
1
Used in conjunction with the OMS [2:0] (0x74 D10:08]), MS (0x20 D08), and MMIX (0x7A D02) bits to set the
microphone selection. This bit enables simultaneous recording from MIC_1 and MIC_2 inputs, using a stereo
microphone array. If the MMIX (0x7A D02) bit is set, this bit is ignored.
2CMIC
0
1
This bit enables spreading of 2-channel media to all 6-output channels. This function is implemented in the
analog section by using the output selector control lines for the center/LFE, surround, and LINE_OUT output
channels. The jack sense pins can also be set up to control (gate) this function, depending on the JSSPRD bit
(see Register 0x72). The SPRD bit operates independently and does not affect the LOSEL and HPSEL operation.
SPRD
0
1
Controls the Hi-Z state of the SURROUND_L/R output pins. Pins are placed into a Hi-Z mode by software control
or when they are selected as inputs to the MIC_1/2 selector (see the OMS [2:0] Bits 740x D [10:08]).
CLDIS
0
1
D13
D12
SODIS
D11
CLDIS
Microphone Boost Gain
20 dB
10 dB
30 dB
Reserved
LINE_IN Selection
LINE_IN pins
SURROUND pins—Places surround outputs in Hi-Z state
MIC_1/2 pins
Surround State
All DAC sample rates are locked to the front sample rate
Front, surround, and LFE sample rates can be set independently
Surround Source
Surround DACs
Analog Mixer
2 Channel MIC State
Both outputs are driven by the left channel of the selector
Stereo operation, the left and right channels are driven
separately
Spread State
No spreading occurs unless activated by jack sense
The SPDR selector drives the center and LFE outputs from the
MONO_OUT
C/LFE Output State
Outputs enabled
Outputs tristated
D10
x
D9
DMIX1
Rev. 0 | Page 43 of 56
D8
DMIX0
D7
SPRD
D6
2CMIC
D5
SOSEL
D4
SRU
D3
LISEL1
D2
LISEL0
Default
Default
Default
Default
Default
Default
Default
Default
D1
MBG1
D0
MBG0
AD1986A
6010
Default