TDA8025HN/C1,551 NXP Semiconductors, TDA8025HN/C1,551 Datasheet - Page 20
![IC SMART CARD INTERFACE 32-HVQFN](/photos/6/51/65170/568-32-hvqfn_sml.jpg)
TDA8025HN/C1,551
Manufacturer Part Number
TDA8025HN/C1,551
Description
IC SMART CARD INTERFACE 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8025HNC1518.pdf
(38 pages)
Specifications of TDA8025HN/C1,551
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Controller Type
Smart Card Interface
Interface
Analog
Voltage - Supply
1.2V, 1.8V, 3V
Current - Supply
65mA
Operating Temperature
-25°C ~ 85°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 25 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935286389551
NXP Semiconductors
TDA8025_1
Product data sheet
Fault detection monitors two different situations (see
On card insertion or removal, bouncing can occur in the PRES and/or PRESN signals.
This depends on the type of card presence switch in the connector (normally open or
normally closed) and the mechanical characteristics of the switch. To correct for this, a
debouncing feature is integrated in to the TDA8025. This feature operates at a typical
duration of 640 (
Remark: f
parameter.
On card insertion, pin OFFN goes HIGH after the debouncing time has elapsed. When the
card is extracted, the automatic card deactivation sequence is performed on the first true
or false transition on pin PRESN or pin PRES. After this pin OFFN goes LOW.
1. Outside card sessions, pin CMDVCCN is HIGH: pin OFFN is LOW if the card is not in
2. Within card sessions, pin CMDVCCN is LOW: when pin OFFN falls LOW, the fault
Fig 14. Emergency deactivation sequence after card removal
•
•
OFFN
PRESN
RST
CLK
I/O
V
XTAL
OSCINT
V
Overheating
the reader and HIGH if the card is in the reader. Any supply voltage drop on
V
internal power-on reset pulse but does not act upon the pin OFFN signal. The card is
not powered-up and as such short-circuits and overheating are not detected.
detection circuit triggers the automatic emergency deactivation sequence (see
Figure
deactivation sequence, pin OFFN is rechecked. If the card is still present, pin OFFN
returns to HIGH. This check identifies the fault as either a hardware problem or a card
removal incident.
CC
DD(INTF)
DD(INTREGD)
osc(int)low
14). When the system controller resets pin CMDVCCN to HIGH, after the
falling
or V
1
is the low frequency (or inactive) mode of the defined f
fosc(int)low
t10
DD(INTF)
Rev. 01 — 6 April 2009
high frequency
). See
is detected by the supply supervisor. This generates an
t12
Figure 15
t
deact
t13
for an overview of the debouncing feature.
t14
Figure 15 on page
low frequency
TDA8025
© NXP B.V. 2009. All rights reserved.
IC card interface
21):
osc(int)
001aai971
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