TDA8025HN/C1,551 NXP Semiconductors, TDA8025HN/C1,551 Datasheet - Page 7
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TDA8025HN/C1,551
Manufacturer Part Number
TDA8025HN/C1,551
Description
IC SMART CARD INTERFACE 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8025HNC1518.pdf
(38 pages)
Specifications of TDA8025HN/C1,551
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Controller Type
Smart Card Interface
Interface
Analog
Voltage - Supply
1.2V, 1.8V, 3V
Current - Supply
65mA
Operating Temperature
-25°C ~ 85°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 25 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935286389551
NXP Semiconductors
8. Functional description
TDA8025_1
Product data sheet
Fig 3.
GND
20
REFERENCE
INTERNAL
VOLTAGE
SUPPLY
SENSE
3.6 V < V
Power strategy
CONFIG
16
REGULATOR
V
DDI(REG)
8.1 Power supplies
DDI(REG)
21
10 F
Remark: Throughout this document the ISO7816 terminology conventions have been
adhered to and it is assumed that the reader is familiar with these.
Two supply selections can be made using pin CONFIG (see
active state of the pin:
Remark: V
The following examples illustrate the voltage restrictions for V
The TDA8025 is held in the reset state until V
PORADJ V
below V
All interface signals to the microcontroller are referenced to V
contacts remain inactive during power-up and power-down cycles.
LOOP
V
< 5.5 V
•
•
•
•
•
CC
19
V
pin CONFIG is LOW: supply is pin V
3.6 V and 5.5 V. The regulator output range is between 3 V and 3.6 V.
pin CONFIG is HIGH: supply pins V
to bypass the regulator. Pin V
CONFIG pin driven to GND: when V
V
CONFIG pin is driven by V
V
CONFIG pin is driven by V
V
100 nF
DD(INTREGD)
10 F
DD(INTF)
DD(INTREGD)
DD(INTREGD)
th
18
14 CGND
, an automatic contact deactivation is triggered.
DD(INTF)
th
V
CC
+ V
must not exceed 3.3 V.
: there no are restrictions for V
hys
is tied to V
must not exceed V
470 nF
plus the t
Rev. 01 — 6 April 2009
001aai959
220 nF
DDI(REG)
w(POR)
DDI(REG)
DDI(REG)
DDI(REG)
: V
delay. If the V
DD(INTREGD)
GND
20
DD(INTF)
without V
with V
DDI(REG)
DD(INTREGD)
DDI(REG)
REFERENCE
INTERNAL
voltage is between 3 V and 3.6 V.
VOLTAGE
SUPPLY
SENSE
3 V < V
CONFIG
16
DD(INTF)
DD(INTREGD)
REGULATOR
must not exceed V
DD(INTF)
V
and V
. The voltage range of the pin is between
DDI(REG)
DD(INTF)
DD(INTREGD)
DD(INTREGD)
+ 0.3 V.
21
is generated by the internal regulator,
tied to both V
DD(INTREGD)
.
tied to V
LOOP
V
reaches V
CC
< 3.6 V
19
V
Figure
100 nF
DD(INTREGD)
10 F
DD(INTF)
DD(INTF)
and PORADJ signals fall
DDI(REG)
18
14 CGND
DDI(REG)
are connected together
DDI(REG)
3) depending on the
th
V
.
. In addition, all card
CC
+ V
TDA8025
© NXP B.V. 2009. All rights reserved.
IC card interface
while
hys
+ 0.3 V.
and
470 nF
and
001aai960
220 nF
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