ISP1583BS ST-Ericsson Inc, ISP1583BS Datasheet - Page 10

• Manufacturer Part Number: ISP1583BS
• Description: IC USB CTRL HI-SPEED 64HVQFN
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1583BS

• Controller Type: USB Peripheral Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 3.
ISP1583_7
Product data sheet
Symbol
MODE1
DGND
ALE/A0
DATA0
DATA1
DATA2
DATA3
V
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
CC(I/O)
[4]
[1]
Pin description
Pin
34
35
36
37
38
39
40
41
42
43
44
45
46
47
ISP1583BS ISP1583ET;
ISP1583ET2
J10
H9
H10
G9
G10
F9
F10
E9
E10
D10
D9
C10
C9
B10
…continued
ISP1583ET1
G8
F8
F7
F6
E6
E7
E8
D7
D6
D8
D5
D4
C8
C7
Rev. 07 — 22 September 2008
Type
I
-
I
I/O
I/O
I/O
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
[2]
Description
mode selection input 1; used in split bus mode only:
Remark: When operating in generic processor mode, set
pin MODE1 as HIGH.
input pad; TTL; 5 V tolerant
digital ground
Address latch enable input — When pin MODE1 = LOW
during power-up, a falling edge on this pin latches the
address on the multiplexed address and data bus AD[7:0].
Address and data selection input — When pin
MODE1 = HIGH during power-up, the function is
determined by the level on this pin (detected on the rising
edge of the WR_N pulse):
Remark: When operating in generic processor mode with
pin MODE1 = HIGH, this pin must be pulled down using a
10 k resistor.
input pad; TTL; 5 V tolerant
bit 0 of the bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 1 of the bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 2 of the bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 3 of the bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
I/O pad supply voltage (1.65 V to 3.6 V); see
bit 4 of the bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 5 of the bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 6 of the bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 7 of the bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 8 of the bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 9 of the bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
•
•
•
•
LOW: ALE function (address latch enable)
HIGH (connect to V
indicator)
mode only
HIGH: bus AD[7:0] is a register address
LOW: bus AD[7:0] is register data; used in split bus
Hi-Speed USB peripheral controller
CC(I/O)
): A0 function (address/data
© NXP B.V. 2008. All rights reserved.
ISP1583
Section 8.16
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