ISP1761ETGE ST-Ericsson Inc, ISP1761ETGE Datasheet - Page 35
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ISP1761ETGE
Manufacturer Part Number
ISP1761ETGE
Description
IC USB CTRL HI-SPEED 128TFBGA
Manufacturer
ST-Ericsson Inc
Datasheet
1.ISP1761BEUM.pdf
(164 pages)
Specifications of ISP1761ETGE
Controller Type
USB Peripheral Controller
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
ISP1761ET
ISP1761ET
ISP1761ET
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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NXP Semiconductors
Table 13.
ISP1761_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HCCPARAMS - Host Controller Capability Parameters register (address 0008h) bit allocation
8.1.4 HCCPARAMS register
PRR
23
15
31
R
R
R
R
0
0
7
0
0
Table 12.
[1]
The Host Controller Capability Parameters (HCCPARAMS) register is a 4 bytes register,
and the bit allocation is given in
Bit
31 to 24
23 to 20
19 to 17
16
15 to 12
11 to 8
7
6 to 5
4
3 to 0
For details on register bit description, refer to
Universal Serial Bus Rev.
22
14
30
R
R
R
R
0
0
6
0
0
N_CC[3:0]
DPN[3:0]
reserved
Symbol
-
DPN[3:0]
-
P_INDICATOR Port Indicators: This bit indicates whether the ports support port
N_CC[3:0]
N_PCC[3:0]
PRR
-
PPC
N_PORTS[3:0] N_Ports: This field specifies the number of physical downstream
HCSPARAMS - Host Controller Structural Parameters register (address 0004h) bit
description
21
13
29
R
R
R
R
0
0
5
0
0
Rev. 05 — 13 March 2008
1.0”.
Description
reserved; write logic 0
Debug Port Number: This field identifies which of the host controller
ports is the debug port.
reserved; write logic 0
indicator control.
Number of Companion Controller: This field indicates the number
of companion controllers associated with this Hi-Speed USB host
controller.
Number of Ports per Companion Controller: This field indicates the
number of ports supported per companion host controller.
Port Routing Rules: This field indicates the method used to map
ports to the companion controllers.
reserved; write logic 0
Port Power Control: This field indicates whether the host controller
implementation includes port power control.
ports implemented on this host controller.
PPC
20
12
Table
28
R
R
R
R
0
0
4
1
0
reserved
[1]
13.
Ref. 2 “Enhanced Host Controller Interface Specification for
19
11
27
R
R
R
R
0
0
3
0
0
reserved
18
10
26
R
R
R
R
0
0
2
N_PORTS[3:0]
0
0
Hi-Speed USB OTG controller
N_PCC[3:0]
17
25
R
R
R
R
0
9
0
1
0
0
© NXP B.V. 2008. All rights reserved.
ISP1761
P_INDICAT
OR
34 of 163
16
24
R
R
R
R
0
8
0
0
1
0
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