ISP1761ETGE ST-Ericsson Inc, ISP1761ETGE Datasheet - Page 91
ISP1761ETGE
Manufacturer Part Number
ISP1761ETGE
Description
IC USB CTRL HI-SPEED 128TFBGA
Manufacturer
ST-Ericsson Inc
Datasheet
1.ISP1761BEUM.pdf
(164 pages)
Specifications of ISP1761ETGE
Controller Type
USB Peripheral Controller
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
ISP1761ET
ISP1761ET
ISP1761ET
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NXP Semiconductors
ISP1761_5
Product data sheet
Fig 16. Dual-role B-device state diagram
9.4.3 HNP implementation and OTG state machine
chrg_vbus/
loc_conn/
START
b_host
loc_sof
a_conn
The OTG state machine is the software behind all the OTG functionality. It is implemented
in the microprocessor system that is connected to the ISP1761. The ISP1761 provides
registers for all input status, the output control and timers to fully support the state
machine transitions in
The following steps are required to enable an OTG interrupt:
1. Set the polarity and level-triggering or edge-triggering mode of the HW Mode Control
b_wait_acon
•
•
•
•
•
b_sess_vld/
chrg_vbus/
loc_conn/
loc_sof/
OTG Control register: Provides control to V
line pull-up or pull-down, SRP detection, and so on.
OTG Status register: Provides status detection on V
V
OTG Interrupt Latch register: Provides interrupts for status change in OTG Interrupt
Status register bits and the OTG Timer time-out event.
OTG Interrupt Enable Fall and OTG Interrupt Enable Rise registers: Provide interrupt
mask for OTG Interrupt Latch register bits.
OTG Timer register: Provides 0.01 ms base programmable timer for use in the OTG
state machine.
register.
id/ |
BUS
session valid, session end, overcurrent and bus status.
b_sess_vld/
id/ |
Figure 15
Rev. 05 — 13 March 2008
b_ase0_brst_tmout
a_bus_resume |
a_bus_suspend
b_bus_req/ |
chrg_vbus/
b_bus_req &
b_hnp_en &
drv_vbus/
loc_conn/
loc_sof/
b_idle
a_conn/
b_sess_vld/
and
Figure
id/ |
16. These registers include:
BUS
id/
b_srp_done
driving, charging or discharging, data
id/ |
b_sess_end &
b_bus_req &
b_se0_srp
BUS
b_peripheral
Hi-Speed USB OTG controller
chrg_vbus/
b_sess_vld
loc_conn
loc_sof/
and data lines including ID,
pulse chrg_vbus
pulse loc_conn
chrg_vbus/
drv_vbus/
loc_conn/
b_srp_init
loc_sof/
a_idle
loc_sof/
004aaa567
© NXP B.V. 2008. All rights reserved.
ISP1761
90 of 163
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