PIC16F887-E/P Microchip Technology Inc., PIC16F887-E/P Datasheet - Page 146

• Manufacturer Part Number: PIC16F887-E/P
• Description: 40 PIN, 14KB FLASH, 368 RAM, 36 I/O, PDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F887-E/P

• A/d Inputs: 14-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Frequency: 20 MHz
• Input Output: 35
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Resistance, Drain To Source On: Bytes
• Serial Interface: MSSP or EUSART
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F882/883/884/886/887
11.6.6
In Half-Bridge applications where all power switches
are modulated at the PWM frequency, the power
switches normally require more time to turn off than to
turn on. If both the upper and lower power switches are
switched at the same time (one turned on, and the
other turned off), both switches may be on for a short
period of time until one switch completely turns off.
During this brief interval, a very high current (shoot-
through current) will flow through both power switches,
shorting the bridge supply. To avoid this potentially
destructive shoot-through current from flowing during
switching, turning on either of the power switches is
normally delayed to allow the other switch to
completely turn off.
In Half-Bridge mode, a digitally programmable dead-
band delay is available to avoid shoot-through current
from destroying the bridge power switches. The delay
occurs at the signal transition from the non-active state
to the active state. See Figure 11-17 for illustration. The
lower seven bits of the associated PWM1CON register
(Register 11-4) sets the delay period in terms of
microcontroller instruction cycles (T
FIGURE 11-18:
DS41291E-page 144
Standard Half-Bridge Circuit (“Push-Pull”)
PROGRAMMABLE DEAD-BAND
DELAY MODE
EXAMPLE OF HALF-BRIDGE APPLICATIONS
CY
or 4 T
P1A
P1B
OSC
).
FET
Driver
FET
Driver
FIGURE 11-17:
P1A
P1B
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
(2)
(2)
V+
V-
(1)
2: Output signals are shown as active-high.
td
Pulse Width
PR2 register.
Load
Period
td
EXAMPLE OF HALF-
BRIDGE PWM OUTPUT
© 2008 Microchip Technology Inc.
+
V
-
+
V
-
(1)
Period
(1)