DSPIC30F6014A-30I/PF Microchip Technology Inc., DSPIC30F6014A-30I/PF Datasheet - Page 233

• Manufacturer Part Number: DSPIC30F6014A-30I/PF
• Description: 16 BIT MCU/DSP 80LD 30MIPS 144 KB FLASH
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F6014A-30I/PF

• A/d Inputs: 16-Channels, 12-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 4K Bytes
• Input Output: 68
• Interface: CAN/I2C/SPI/UART
• Ios: 68
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 80-pin TQFP
• Programmable Memory: 144K Bytes
• Ram Size: 8K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part

Software Simulator (MPLAB SIM)..................................... 172
Software Stack Pointer, Frame Pointer............................... 16
SPI Module ......................................................................... 91
STATUS Register ............................................................... 16
Symbols used in Opcode Descriptions ............................. 164
System Integration ............................................................ 143
T
Table Instruction Operation Summary ................................ 51
Temperature and Voltage Specifications
Timer1 Module .................................................................... 69
Timer2 and Timer3 Selection Mode .................................... 88
Timer2/3 Module ................................................................. 73
Timer4/5 Module ................................................................. 79
Timing Characteristics
© 2005 Microchip Technology Inc.
CALL Stack Frame...................................................... 35
Framed SPI Support ................................................... 91
Operating Function Description .................................. 91
Operation During CPU Idle Mode ............................... 93
Operation During CPU Sleep Mode............................ 93
SDOx Disable ............................................................. 91
Slave Select Synchronization ..................................... 93
SPI1 Register Map...................................................... 94
SPI2 Register Map...................................................... 94
Timing Characteristics
Timing Requirements
Word and Byte Communication .................................. 91
Register Map for dsPIC30F601xA ............................ 161
AC ............................................................................. 187
16-bit Asynchronous Counter Mode ........................... 69
16-bit Synchronous Counter Mode ............................. 69
16-bit Timer Mode....................................................... 69
Gate Operation ........................................................... 70
Interrupt....................................................................... 71
Operation During Sleep Mode .................................... 70
Prescaler..................................................................... 70
Real-Time Clock ......................................................... 71
Register Map............................................................... 72
16-bit Timer Mode....................................................... 73
32-bit Synchronous Counter Mode ............................. 73
32-bit Timer Mode....................................................... 73
ADC Event Trigger...................................................... 76
Gate Operation ........................................................... 76
Interrupt....................................................................... 76
Operation During Sleep Mode .................................... 76
Register Map............................................................... 77
Timer Prescaler........................................................... 76
Register Map............................................................... 81
ADC
Band Gap Start-up Time ........................................... 193
CAN Module I/O........................................................ 210
CLKOUT and I/O....................................................... 191
DCI Module
External Clock........................................................... 187
Master Mode (CKE = 0) .................................... 201
Master Mode (CKE = 1) .................................... 202
Slave Mode (CKE = 1) .............................. 203, 204
Master Mode (CKE = 0) .................................... 201
Master Mode (CKE = 1) .................................... 202
Slave Mode (CKE = 0) ...................................... 203
Slave Mode (CKE = 1) ...................................... 205
Interrupts............................................................. 71
Oscillator Operation ............................................ 71
Low-speed (ASAM = 0, SSRC = 000) .............. 213
AC-Link Mode ................................................... 200
Multichannel, I
2
S Modes ................................... 198
dsPIC30F6011A/6012A/6013A/6014A
Timing Diagrams
Timing Diagrams.See Timing Characteristics
Timing Requirements
Timing Specifications
I
I
Input Capture (CAPX)............................................... 196
OC/PWM Module...................................................... 197
Oscillator Start-up Timer........................................... 192
Output Compare Module .......................................... 196
Power-up Timer ........................................................ 192
Reset ........................................................................ 192
SPI Module
Type A, B and C Timer External Clock ..................... 194
Watchdog Timer (WDT)............................................ 192
CAN Bit..................................................................... 116
Frame Sync, AC-Link Start of Frame ....................... 126
Frame Sync, Multi-Channel Mode ............................ 126
I
PWM Output ............................................................... 89
Time-out Sequence on Power-up (MCLR Not
Time-out Sequence on Power-up (MCLR Not
Time-out Sequence on Power-up (MCLR Tied
Band Gap Start-up Time........................................... 193
Brown-out Reset....................................................... 193
CAN Module I/O ....................................................... 210
CLKOUT and I/O ...................................................... 191
DCI Module
External Clock .......................................................... 188
I
I
Input Capture............................................................ 196
Oscillator Start-up Timer........................................... 193
Output Compare Module .......................................... 196
Power-up Timer ........................................................ 193
Reset ........................................................................ 193
Simple OC/PWM Mode ............................................ 197
SPI Module
Type A Timer External Clock .................................... 194
Type B Timer External Clock .................................... 195
Type C Timer External Clock.................................... 195
Watchdog Timer (WDT)............................................ 193
External Clock Requirements ................................... 188
PLL Clock ................................................................. 189
PLL Jitter .................................................................. 189
2
2
2
2
2
C Bus Data
C Bus Start/Stop Bits
S Interface Frame Sync ......................................... 126
C Bus Data (Master Mode) .................................... 207
C Bus Data (Slave Mode) ...................................... 209
Master Mode..................................................... 206
Slave Mode ...................................................... 208
Master Mode..................................................... 206
Slave Mode ...................................................... 208
Master Mode (CKE = 0).................................... 201
Master Mode (CKE = 1).................................... 202
Slave Mode (CKE = 0)...................................... 203
Slave Mode (CKE = 1)...................................... 204
Tied to V
Tied to V
to V
AC-Link Mode................................................... 200
Multichannel, I
Master Mode (CKE = 0).................................... 201
Master Mode (CKE = 1).................................... 202
Slave Mode (CKE = 0)...................................... 203
Slave Mode (CKE = 1)...................................... 205
DD
).............................................................. 154
DD
DD
), Case 1 ........................................ 154
), Case 2 ........................................ 155
2
S Modes................................... 199
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