PIC16F785-I/P Microchip Technology Inc., PIC16F785-I/P Datasheet - Page 110

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PIC16F785-I/P

Manufacturer Part Number
PIC16F785-I/P
Description
MCU, 8-Bit, 2KW Flash, 128 RAM, 18 I/O, DIP-20
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F785-I/P

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
17
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
PIC16F785/HV785
REGISTER 15-1:
DS41249D-page 108
bit 13
bit 13-12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
Unimplemented: Read as ‘1’
FCMEN: Fail-Safe Clock Monitor Enabled bit
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
IESO: Internal External Switchover bit
1 = Internal External Switchover mode is enabled
0 = Internal External Switchover mode is disabled
BOREN<1:0>: Brown-out Reset Selection bits
11 = BOR enabled
10 = BOR enabled during operation and disabled in Sleep
01 = BOR controlled by SBOREN bit (PCON<4>)
00 = BOR disabled
CPD: Data Code Protection bit
1 = Data memory code protection is disabled
0 = Data memory code protection is enabled
CP: Code Protection bit
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
MCLRE: RA3/MCLR pin function select bit
1 = RA3/MCLR pin function is MCLR
0 = RA3/MCLR pin function is digital input, MCLR internally tied to V
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled and can be enabled by SWDTEN bit (WDTCON<0>)
FOSC<2:0>: Oscillator Selection bits
111 = RC oscillator: CLKOUT function on RA4/AN3/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN
110 = RCIO oscillator: I/O function on RA4/AN3/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN
101 = INTOSC oscillator: CLKOUT function on RA4/AN3/T1G/OSC2/CLKOUT pin, I/O function on
100 = INTOSCIO oscillator: I/O function on RA4/AN3/T1G/OSC2/CLKOUT pin, I/O function on
011 = EC: I/O function on RA4/AN3/T1G/OSC2/CLKOUT pin, CLKIN on RA5/T1CKI/OSC1/CLKIN
010 = HS oscillator: High-speed crystal/resonator on RA4/AN3/T1G/OSC2/CLKOUT and RA5/T1CKI/OSC1/
001 = XT oscillator: Crystal/resonator on RA4/AN3/T1G/OSC2/CLKOUT and RA5/T1CKI/OSC1/CLKIN
000 = LP oscillator: Low-power crystal on RA4/AN3/T1G/OSC2/CLKOUT and RA5/T1CKI/OSC1/CLKIN
Note 1:
Legend:
R = Readable bit
-n = Value at POR
FCMEN
2:
3:
4:
5:
RA5/T1CKI/OSC1/CLKIN
RA5/T1CKI/OSC1/CLKIN
CLKIN
CONFIG: CONFIGURATION WORD (ADDRESS: 2007h)
Enabling Brown-out Reset does not automatically enable Power-up Timer.
Program memory bulk erase must be performed to turn off code protection.
The entire data EEPROM will be erased when the code protection is turned off.
When MCLR is asserted in INTOSC or RC mode, the internal clock oscillator is disabled.
If the HS, XT, or LP oscillator fails In Fail-safe mode the Watchdog time-out can occur only once after
which it will be disabled until the oscillator is restored.
IESO
(5)
BOREN1 BOREN0
(2)
(2), (3)
W = Writable bit
‘1’ = Bit is set
(5)
Preliminary
(4)
CPD
(5)
(1)
CP
MCLRE PWRTE WDTE FOSC2 FOSC1 FOSC0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DD
© 2006 Microchip Technology Inc.
x = Bit is unknown
(5)
(5)
bit 0

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