PIC16F726-I/SP Microchip Technology Inc., PIC16F726-I/SP Datasheet - Page 33

• Manufacturer Part Number: PIC16F726-I/SP
• Description: 28 PIN, 14 KB FLASH, 1.8V-5.5V, 16 MHZ INT. OSC.
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F726-I/SP

• A/d Inputs: 11-Channel, 8-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Frequency: 20 MHz
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Resistance, Drain To Source On: Bytes
• Serial Interface: I2C, SPI, AUSART
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

3.0
The PIC16F72X/PIC16LF72X differentiates between
various kinds of Reset:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset (POR)
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
FIGURE 3-1:
© 2008 Microchip Technology Inc.
Power-on Reset (POR)
WDT Reset during normal operation
WDT Reset during Sleep
MCLR Reset during normal operation
MCLR Reset during Sleep
Brown-out Reset (BOR)
RESETS
MCLR/V
OSC1/
CLKIN
Note 1:
V
DD
PP
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
WDTOSC
OST/PWRT
Refer to the Configuration Word Register 1 (Register 8-1).
Brown-out
Module
WDT
Reset
POR
MCLRE
OST
PWRT
(1)
10-bit Ripple Counter
WDT
Time-out
Reset
11-bit Ripple Counter
BOREN
Power-on Reset
Sleep
Preliminary
PIC16F72X/PIC16LF72X
Most registers are not affected by a WDT wake-up
since this is viewed as the resumption of normal
operation. TO and PD bits are set or cleared differently
in different Reset situations, as indicated in Table 3-3.
These bits are used in software to determine the nature
of the Reset.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 3-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 23.0 “Electrical
Specifications” for pulse width specifications.
Enable PWRT
Enable OST
DS41341B-page 31
Chip_Reset