PIC16F726-I/SP Microchip Technology Inc., PIC16F726-I/SP Datasheet - Page 64
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PIC16F726-I/SP
Manufacturer Part Number
PIC16F726-I/SP
Description
28 PIN, 14 KB FLASH, 1.8V-5.5V, 16 MHZ INT. OSC.
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F726-ISP.pdf
(266 pages)
Specifications of PIC16F726-I/SP
A/d Inputs
11-Channel, 8-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Frequency
20 MHz
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
I2C, SPI, AUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC16F72X/PIC16LF72X
REGISTER 6-7:
REGISTER 6-8:
REGISTER 6-9:
DS41341B-page 62
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note 1:
WPUB7
IOCB7
R/W-1
R/W-0
U-0
—
2:
Global RBPU bit of the OPTION register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in configured as an output.
When setting a pin to an analog input, the corresponding TRIS bit must be set to Input mode in order to
allow external control of the voltage on the pin.
Unimplemented: Read as ‘0’
ANSB<5:0>: Analog Select between Analog or Digital Function on Pins RB<5:0>, respectively
0 = Digital I/O. Pin is assigned to port or Digital special function.
1 = Analog input. Pin is assigned as analog input
WPUB<7:0>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
IOCB<7:0>: Interrupt-on-Change PORTB Control bits
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
WPUB6
IOCB6
R/W-1
R/W-0
U-0
—
WPUB: WEAK PULL-UP PORTB REGISTER
IOCB: INTERRUPT-ON-CHANGE PORTB REGISTER
ANSELB: PORTB ANALOG SELECT REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
ANSB5
WPUB5
R/W-1
IOCB5
R/W-1
R/W-0
WPUB4
ANSB4
IOCB4
R/W-1
R/W-0
R/W-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WPUB3
IOCB3
ANSB3
R/W-1
R/W-0
R/W-1
(1)
. Digital Input buffer disabled.
WPUB2
ANSB2
IOCB2
R/W-1
R/W-0
R/W-1
© 2008 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
WPUB1
ANSB1
R/W-1
IOCB1
R/W-1
R/W-0
ANSB0
WPUB0
R/W-1
IOCB0
R/W-1
R/W-0
bit 0
bit 0
bit 0
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