PIC16F726-I/SP Microchip Technology Inc., PIC16F726-I/SP Datasheet - Page 43
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PIC16F726-I/SP
Manufacturer Part Number
PIC16F726-I/SP
Description
28 PIN, 14 KB FLASH, 1.8V-5.5V, 16 MHZ INT. OSC.
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F726-ISP.pdf
(266 pages)
Specifications of PIC16F726-I/SP
A/d Inputs
11-Channel, 8-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Frequency
20 MHz
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
I2C, SPI, AUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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4.0
The PIC16F72X/PIC16LF72X device family features
an interruptible core, allowing certain events to
preempt normal program flow. An Interrupt Service
Routine (ISR) is used to determine the source of the
interrupt and act accordingly. Some interrupts can be
configured to wake the MCU from Sleep mode.
FIGURE 4-1:
© 2008 Microchip Technology Inc.
IOC-RB0
IOC-RB1
IOC-RB2
IOC-RB3
IOC-RB4
IOC-RB5
IOC-RB6
IOC-RB7
IOCB0
IOCB1
IOCB2
IOCB3
IOCB4
IOCB5
IOCB6
IOCB7
INTERRUPTS
INTERRUPT LOGIC
TMR1GIE
TMR1GIF
TMR2IE
TMR1IF
TMR1IE
TMR2IF
CCP1IF
CCP1IE
CCP2IF
CCP2IE
SSPIF
SSPIE
RCIE
RCIF
ADIF
ADIE
TXIF
TXIE
Preliminary
PIC16F72X/PIC16LF72X
The PIC16F72X/PIC16LF72X device family has 12
interrupt sources, differentiated by corresponding
interrupt enable and flag bits:
• Timer0 Overflow Interrupt
• External Edge Detect on INT Pin Interrupt
• PORTB Change Interrupt
• Timer1 Gate Interrupt
• A/D Conversion Complete Interrupt
• AUSART Receive Interrupt
• AUSART Transmit Interrupt
• SSP Event Interrupt
• CCP1 Event Interrupt
• Timer2 Match with PR2 Interrupt
• Timer1 Overflow Interrupt
• CCP2 Event Interrupt
A block diagram of the interrupt logic is shown in
Figure 4-1.
Note 1:
RBIE
INTF
INTE
RBIF
PEIE
T0IF
T0IE
GIE
Some peripherals depend upon the
system clock for operation. Since the
system clock is suspended during
Sleep, these peripherals will not wake
the part from Sleep. See Section 19.1
“Wake-up from Sleep”.
Wake-up (If in Sleep mode)
Interrupt to CPU
DS41341B-page 41
(1)
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