ispPAC-POWR1220AT8-01T100I Lattice, ispPAC-POWR1220AT8-01T100I Datasheet - Page 54

• Manufacturer Part Number: ispPAC-POWR1220AT8-01T100I
• Description: Supervisory Circuits Prec Prg Pwr Spply S eq. Mon. Mrg Trim I
• Manufacturer: Lattice
• Series: ispPAC®r

Specifications of ispPAC-POWR1220AT8-01T100I

• Number Of Voltages Monitored: 12
• Undervoltage Threshold: 0.8 V
• Output Type: Open Collector / Drain
• Manual Reset: Not Resettable
• Watchdog: No Watchdog
• Power-up Reset Delay (typ): 500 ms
• Supply Voltage (max): 3.96 V
• Supply Voltage (min): 2.8 V
• Supply Current (typ): 40 mA
• Mounting Style: SMD/SMT
• Package / Case: TQFP-100
• Applications: General Purpose
• Voltage - Input: -0.3 V ~ 5.9 V
• Voltage - Supply: 2.8 V ~ 3.96 V
• Current - Supply: 40mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Revision History
October 2005
October 2006
August 2007
March 2006
June 2008
May 2006
May 2010
Date
Version
01.4
01.5
01.6
1.0
1.1
1.2
1.3
Initial release.
Pin Descriptions table, note 4: Clarification for un-used VMON pins to be tied to
GNDD.
Correction for I
Updated HVOUT Isource range:12.5µA to 100µA.
ADC Characteristics table, ADC Conversion Time: added entry for Tconvert = 200 µs.
Added footnotes for I
Figure 13, Isource 12.5µA to 100µA.
Clarified operation of ADC conversions.
TAP instructions, added JTAG SAMPLE/PRELOAD instruction and notes for all JTAG
instructions
Data sheet status changed to “final”.
Analog Specifications table, lowered Max. Icc to 40 mA.
Voltage Monitors table, tightened Input Resistor Variation to 15%.
Margin Trim DAC Output Characteristics table, increased Max. DAC output current to
+/- 200 µA.
AC/Transient Characteristics table, tightened Internal Oscillator frequency variation
down to 5%.
Digital Specifications table, included V
Changes to HVOUT pin specifications.
Added timing diagram and timing parameters to "Power-On Reset" specifications.
Modified PLD Architecture figure to show input registers.
Updated I
VCCPROG pin usage clarification added.
VCCPROG pin usage further clarified.
Added product information for ispPAC-POWR1220AT8-02.
T
ispPAC-POWR1220AT8 Alternate TDI Configuration Diagram clarified.
GOOD
changed from a MIN to a MAX.
2
C Control Registers table.
2
C/ADC calculation.
1-54
2
C frequency.
Change Summary
ispPAC-POWR1220AT8 Data Sheet
IL
and V
IH
specifications for I
2
C interface.