PSB21150HV14XP Infineon Technologies, PSB21150HV14XP Datasheet - Page 158
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PSB21150HV14XP
Manufacturer Part Number
PSB21150HV14XP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21150HV14XP.pdf
(270 pages)
Specifications of PSB21150HV14XP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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The following description gives an example for the transmission of a 76 byte frame with
a selected block size of 32 byte:
• The host writes 32 bytes to the XFIFOx, issues an XTF command and waits for an
• The IPAC-X immediately issues an XPR interrupt (as remaining XFIFOx space is not
• Due to the XPR interrupt the host writes the next 32 bytes to the XFIFOx, followed by
• As soon as the last byte of the first block is transmitted, the IPAC-X releases an XPR
• The host writes the remaining 12 bytes of the frame to the XFIFOx and issues the XTF
• After the last byte of the frame has been transmitted the IPAC-X releases an XPR
Figure 84
Data Sheet
Transmit
Frame
XPR interrupt in order to continue with entering data.
used) and starts transmission.
the XTF command, and waits for XPR.
(XFIFOx space of first data block is free again) and continues transmitting the second
block.
command together with XME to indicate that this is the end of frame.
interrupt and the host may proceed with transmission of a new frame.
32 Bytes
WR
Transmission Sequence Example
XTF
XPR
32 Bytes
WR
32
XTF
XPR
CPU Interface
IOM Interface
76 Bytes
158
12 Bytes
WR
XTF+XME
32
Description of Functional Blocks
12
XPR
PSB/PSF 21150
2003-01-30
fifoseq_tran.vsd
IPAC-X
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